DBT-RISE/DBT-RISE-TGC
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Author SHA1 Message Date
eyck 43d7b99905 revert pmp check implementation 2021-11-11 09:58:19 +01:00
eyck f90c48e881 adapt to changed define names 2021-11-11 08:33:35 +01:00
eyck 2d7973520b fix mip handling 2021-11-09 19:47:34 +01:00
eyck fd98ad95f6 rework PMP check and fix MISA for TGC_D 2021-11-09 15:55:22 +01:00
eyck bfa8166223 fix wrong template class name 2021-11-08 10:44:33 +01:00
eyck c42e336509 fix proper debug mode handling (#267 & #268) 2021-11-07 17:48:44 +01:00
eyck 49d09a05d7 fix access rights to debug CSR register (#268) 2021-11-07 16:45:10 +01:00
eyck 459794b863 add proper handling of store access fault (hart_mu_p) 2021-11-06 13:29:11 +01:00
eyck 039746112b fix exception behavior 2021-11-02 15:10:20 +01:00
eyck ac6d7ea5d4 add debug feature to platform 2021-11-02 11:13:29 +01:00
eyck 8b6e3abd23 fix hard-code arch in templates 2021-10-30 13:37:17 +02:00
eyck 1616f0ac90 remove deprecated functions 2021-10-30 12:57:08 +02:00
eyck a20f39e847 update core definitions to include Zicsr and Zifencei (#276) 2021-10-30 12:56:31 +02:00
eyck 334d3fb296 adapt to SCC changes 2021-10-21 22:53:16 +02:00
eyck eb2ca33e5a remove unused sources 2021-10-12 15:17:56 +02:00
eyck 0ea4cba1ca add dynamic plugin loading 2021-10-12 14:24:55 +02:00
eyck 1d13c8196e fix wrong PGMASK usage 2021-10-11 10:40:01 +02:00
eyck ee6e1d4092 Merge remote-tracking branch 'origin/msvc_compat' into develop 
Conflicts:
	src/sysc/core_complex.cpp
 2021-10-11 09:42:40 +02:00
eyck c8679fca85 remove MSVC warning 2021-10-10 19:56:33 +02:00
eyck f0ada1ba8c add MSVC 16 compatibility 2021-10-10 19:06:41 +02:00
eyck b17682e50e fix YAML template 2021-10-01 23:49:04 +02:00
eyck 5866acf565 update .gitignore 2021-10-01 13:06:10 +02:00
eyck 6acf73a40f add template to generate instruction YAML 2021-10-01 13:05:36 +02:00
eyck 2f15d9676e fix unaligned instr fetch behavior 2021-09-30 19:27:46 +02:00
eyck d78fcc48e5 use marchid in platform 2021-09-30 19:27:03 +02:00
eyck 4186723d37 add marchid setting to CoreDSL description 2021-09-30 19:26:21 +02:00
eyck 17ee7b138d update generated TGC-C VM 2021-09-29 00:44:17 +02:00
eyck aa84a27a5b fix JALR alignment in description 2021-09-29 00:43:42 +02:00
eyck 438e598a4a remove clutter from core descriptions, added instr alignment setting 2021-09-29 00:03:11 +02:00
eyck 174259155d add support for non-compressed ISA 2021-09-23 21:09:52 +02:00
eyck ba9339a50d fix MPP reset value, PMP inactive in U-mode handling and MRET in U-mode 2021-09-21 16:52:40 +02:00
eyck 65b4db5eca remove mcounteren in M-mode only platform 2021-09-18 11:40:00 +02:00
eyck 0fd82f1f3c add tgc_d_xrb_mac to SC and C++ ISS 2021-09-04 13:04:34 +02:00
eyck a3084456fd rework core definitions 2021-09-04 12:47:07 +02:00
eyck 09b01af3fa fix find_package use and debug access alignment check 2021-08-26 22:10:27 +02:00
eyck 9c8b72693e correct trap ids of access faults 2021-08-20 09:02:56 +02:00
eyck c409e7b7ca adapt to fixed handling of SystemCPackage 2021-08-19 13:38:29 +02:00
eyck 2f05083cf0 fix elf loader and pmp check for debug accesses 2021-08-19 10:50:25 +02:00
eyck e934049dd4 fix inconsistency due to PA adaptation 2021-08-16 17:55:14 +02:00
Eyck Jentzsch 94f796ebdb add install target and PA compatibility 2021-08-16 17:02:31 +02:00
eyck 836ba269e3 fix clic reset values 2021-08-16 15:05:05 +02:00
eyck c8681096be update vm_tgfs_c to match CoreDSL 2021-08-14 10:57:36 +02:00
eyck adeffe47ad fix behavior of riscv_hart_mu_p to match TGC_D 2021-08-12 20:34:10 +02:00
eyck d95846a849 fix trap handling if illegal fetch (PMP) and U-mode CSRs 2021-08-01 17:23:22 +02:00
eyck af887c286f fix for #2 2021-07-28 09:09:08 +02:00
eyck 4ddf50162c make library naming consistent 2021-07-27 15:55:08 +02:00
eyck da819d8890 fix SystemC lib handling in build system 2021-07-27 12:25:31 +02:00
eyck 5ef5d57d30 Merge branch 'tmp' into develop 2021-07-27 10:49:35 +02:00
eyck d7bddd825c add clic CSRs 2021-07-27 10:47:48 +02:00
eyck 15f46a87db adapt core_complex to use scv-tr (scc commit id a3cde47) 2021-07-27 09:38:05 +02:00
eyck fc1ae4d57d update build system 2021-07-26 12:03:52 +02:00
eyck d0f3a120fd fix naming in MU wrapper 2021-07-19 16:26:23 +02:00
eyck c592a26346 fix mepc mask 2021-07-09 13:01:22 +02:00
eyck e68918c2e8 fix instruction decode 2021-07-09 07:37:12 +02:00
eyck 473f8a5a17 fix privilege behavior 2021-07-07 11:30:00 +02:00
eyck 2f4b5bd9b2 fix detailed behavior of TGC_C 2021-07-06 21:19:36 +02:00
eyck 23b9741adf refine and fix TGC_C iss to becoem compliant 2021-06-29 11:51:30 +02:00
eyck 5d8da08ce5 fix linker issue 
the root cuase of the issue is the template paramter deduction which led
to the wrong template parameter.
 2021-06-26 14:30:36 +02:00
eyck e432dd8208 fix handling of exceptions while accessing address spaces 2021-06-07 22:22:36 +02:00
eyck 8c385647dd remove redundant code from checked in generated sources 2021-05-26 23:06:31 +02:00
eyck aaceecd5dc fix mu_p platform features and CSRs 2021-05-17 09:20:09 +02:00
eyck 4b3f5a6b0c add missing change 2021-05-16 16:44:30 +02:00
eyck d41e1d816a add factory for ISS and use it in main.cpp 2021-05-16 16:44:14 +02:00
eyck a35974c9f5 make cpu type in core_complex configurable 2021-05-16 15:06:42 +02:00
eyck 9c456ba8f2 initial version of MU hart 2021-05-14 13:29:39 +02:00
eyck c57884caee small fix 2021-05-13 16:01:04 +02:00
eyck cf7b62a3f9 update names 2021-05-13 15:54:48 +02:00
eyck f2bf6d682a fix build setup 2021-05-13 14:03:10 +02:00
eyck a1fa8877f7 make core name a cmake option 2021-05-13 09:32:38 +02:00
eyck 391f9bb808 remove unneeded constants 2021-05-08 15:14:19 +02:00
eyck 0a76ccbdac make RSP register response independend of register definition 2021-03-31 07:48:46 +00:00
eyck 32e4aa83b8 use extracted variables 2021-03-27 09:36:52 +00:00
eyck 78c7064295 update groovy template to extract used registers 2021-03-26 08:24:45 +00:00
eyck 412a4bd9bb update name 2021-03-23 17:13:32 +00:00
eyck b0bcb7febb small fixes for robustness and readability 2021-03-22 22:47:30 +00:00
eyck 51fbc34fb3 change namespace of core complex 2021-03-22 11:57:40 +00:00
eyck 4e0f20eba0 rework abort conditions 2021-03-17 19:32:57 +00:00
eyck ff3fa19208 fix RVM description bugs 2021-03-13 10:46:41 +00:00
eyck 80057eef32 fix RVC description bugs, remove paged fetch 2021-03-13 10:46:41 +00:00
eyck f4ec21007b fix signedness issues 2021-03-11 16:12:28 +00:00
eyck ac8eab6e25 update RISC-V desciptions 2021-03-10 17:31:10 +00:00
eyck 768716b064 fix another missing XLEN 2021-03-09 11:07:56 +00:00
eyck bea0dcc387 update missing XLEN 2021-03-09 11:03:37 +00:00
eyck a6691bcd3c update generated code with correct sign extension 2021-03-09 10:21:36 +00:00
eyck 40db74ce02 remove tgf_b code generation 2021-03-07 16:26:14 +00:00
eyck c171e3c1ba update CoreDSL descriptions 2021-03-07 10:51:15 +00:00
eyck c251fe15d5 fix desscriptions to conform to ISA spec version 20191213 and TGF-C 2021-03-07 10:51:00 +00:00
eyck dae8acb8a3 checkpoint before refactor 2021-03-06 07:17:42 +00:00
eyck f7cec99fa6 adapt to changes in SCC 2021-03-01 21:08:18 +00:00
eyck be0e7db185 fix templates to comply with CoreDSL2 2021-03-01 21:07:20 +00:00
eyck 4aa26b85a0 adapt to change in SCC 2021-03-01 06:36:27 +00:00
eyck 9534d58d01 regenerated sources and and add opcode enum to headers 
Conflicts:
	gen_input/CoreDSL-Instruction-Set-Description
 2021-03-01 06:26:33 +00:00
eyck 1668df0531 regenerated sources and and add opcode enum to headers 2021-02-23 08:29:31 +00:00
eyck d8e009c72b update CoreDSL decriptions 2021-02-15 18:15:13 +00:00
eyck d07c8679ed update core definition 2021-02-15 18:14:52 +00:00
eyck 3d5b61f301 move boost libraries from tgfs_sc to tgfs library 2021-02-15 18:03:39 +00:00
eyck 337f1634c0 add mssing change 2021-02-15 18:01:46 +00:00
eyck 72b09472d5 update RISC-V descriptions 2021-02-15 18:01:33 +00:00
eyck 3261055871 update description to latest CoreDSL2 2021-02-15 11:35:56 +00:00
eyck 34bb8e62ae generate working ISS from CoreDSL 2.0 2021-02-06 14:47:06 +00:00