fix handling of exceptions while accessing address spaces
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8c385647dd
commit
e432dd8208
@ -49,8 +49,8 @@ endif()
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# Define the library
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add_library(${PROJECT_NAME} SHARED ${LIB_SOURCES})
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# list code gen dependencies
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if(TARGET ${CORE_NAME}_src)
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add_dependencies(${PROJECT_NAME} ${CORE_NAME}_src)
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if(TARGET ${CORE_NAME}_cpp)
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add_dependencies(${PROJECT_NAME} ${CORE_NAME}_cpp)
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endif()
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target_compile_options(${PROJECT_NAME} PRIVATE -Wno-shift-count-overflow)
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@ -67,6 +67,7 @@ set_target_properties(${PROJECT_NAME} PROPERTIES
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if(SystemC_FOUND)
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add_library(${PROJECT_NAME}_sc src/sysc/core_complex.cpp)
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target_compile_definitions(${PROJECT_NAME}_sc PUBLIC WITH_SYSTEMC)
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target_compile_definitions(${PROJECT_NAME} PRIVATE CORE_${CORE_NAME})
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if(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/incl/iss/arch/tgc_b.h)
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target_compile_definitions(${PROJECT_NAME}_sc PRIVATE CORE_TGC_B)
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endif()
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@ -1 +1 @@
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Subproject commit a5f12b0659ba668c2a8651bd23be19bab2bb6f12
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Subproject commit cf601042edaef9661b42a4ab295812d0eca48264
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@ -155,14 +155,42 @@ protected:
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template<typename T>
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T& pc_assign(T& val){super::ex_info.branch_taken=true; return val;}
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inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint8_t>(space, addr);}
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inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint16_t>(space, addr);}
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inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint32_t>(space, addr);}
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inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){return super::template read_mem<uint64_t>(space, addr);}
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inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){super::write_mem(space, addr, data);}
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inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){super::write_mem(space, addr, data);}
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inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){super::write_mem(space, addr, data);}
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inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){super::write_mem(space, addr, data);}
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inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint8_t>(space, addr);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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return ret;
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}
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inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint16_t>(space, addr);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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return ret;
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}
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inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint32_t>(space, addr);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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return ret;
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}
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inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint64_t>(space, addr);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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return ret;
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}
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inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){
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super::write_mem(space, addr, data);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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}
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inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){
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super::write_mem(space, addr, data);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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}
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inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){
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super::write_mem(space, addr, data);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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}
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inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){
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super::write_mem(space, addr, data);
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if(this->template get_reg<uint32_t>(traits::TRAP_STATE)) throw 0;
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}
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template<unsigned W, typename U, typename S = typename std::make_signed<U>::type>
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inline S sext(U from) {
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auto mask = (1ULL<<W) - 1;
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@ -208,8 +236,10 @@ private:
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<%}}%>// calculate next pc value
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*NEXT_PC = *PC + ${instr.length/8};
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// execute instruction
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try {
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<%instr.behavior.eachLine{%>${it}
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<%}%>// post execution stuff
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<%}%>} catch(...){}
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// post execution stuff
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if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, ${idx});
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auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
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// trap check
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@ -228,7 +258,7 @@ private:
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uint32_t* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
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uint32_t* NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
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*NEXT_PC = *PC + ((instr & 3) == 3 ? 4 : 2);
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raise(0, 11);
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raise(0, 2);
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// post execution stuff
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if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast<unsigned>(arch::traits<ARCH>::opcode_e::MAX_OPCODE));
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auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
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@ -125,56 +125,54 @@ template <> struct traits<tgc_c> {
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OR = 35,
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AND = 36,
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FENCE = 37,
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FENCE_I = 38,
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ECALL = 39,
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EBREAK = 40,
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URET = 41,
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SRET = 42,
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MRET = 43,
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WFI = 44,
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SFENCE_VMA = 45,
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CSRRW = 46,
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CSRRS = 47,
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CSRRC = 48,
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CSRRWI = 49,
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CSRRSI = 50,
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CSRRCI = 51,
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MUL = 52,
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MULH = 53,
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MULHSU = 54,
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MULHU = 55,
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DIV = 56,
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DIVU = 57,
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REM = 58,
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REMU = 59,
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CADDI4SPN = 60,
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CLW = 61,
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CSW = 62,
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CADDI = 63,
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CNOP = 64,
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CJAL = 65,
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CLI = 66,
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CLUI = 67,
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CADDI16SP = 68,
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CSRLI = 69,
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CSRAI = 70,
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CANDI = 71,
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CSUB = 72,
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CXOR = 73,
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COR = 74,
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CAND = 75,
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CJ = 76,
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CBEQZ = 77,
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CBNEZ = 78,
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CSLLI = 79,
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CLWSP = 80,
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CMV = 81,
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CJR = 82,
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CADD = 83,
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CJALR = 84,
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CEBREAK = 85,
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CSWSP = 86,
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DII = 87,
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ECALL = 38,
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EBREAK = 39,
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URET = 40,
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SRET = 41,
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MRET = 42,
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WFI = 43,
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CSRRW = 44,
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CSRRS = 45,
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CSRRC = 46,
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CSRRWI = 47,
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CSRRSI = 48,
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CSRRCI = 49,
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MUL = 50,
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MULH = 51,
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MULHSU = 52,
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MULHU = 53,
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DIV = 54,
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DIVU = 55,
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REM = 56,
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REMU = 57,
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CADDI4SPN = 58,
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CLW = 59,
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CSW = 60,
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CADDI = 61,
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CNOP = 62,
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CJAL = 63,
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CLI = 64,
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CLUI = 65,
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CADDI16SP = 66,
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CSRLI = 67,
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CSRAI = 68,
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CANDI = 69,
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CSUB = 70,
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CXOR = 71,
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COR = 72,
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CAND = 73,
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CJ = 74,
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CBEQZ = 75,
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CBNEZ = 76,
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CSLLI = 77,
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CLWSP = 78,
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CMV = 79,
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CJR = 80,
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CADD = 81,
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CJALR = 82,
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CEBREAK = 83,
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CSWSP = 84,
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DII = 85,
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MAX_OPCODE
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};
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};
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