diff --git a/CMakeLists.txt b/CMakeLists.txt index f5b9007..6934de3 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -49,8 +49,8 @@ endif() # Define the library add_library(${PROJECT_NAME} SHARED ${LIB_SOURCES}) # list code gen dependencies -if(TARGET ${CORE_NAME}_src) - add_dependencies(${PROJECT_NAME} ${CORE_NAME}_src) +if(TARGET ${CORE_NAME}_cpp) + add_dependencies(${PROJECT_NAME} ${CORE_NAME}_cpp) endif() target_compile_options(${PROJECT_NAME} PRIVATE -Wno-shift-count-overflow) @@ -67,6 +67,7 @@ set_target_properties(${PROJECT_NAME} PROPERTIES if(SystemC_FOUND) add_library(${PROJECT_NAME}_sc src/sysc/core_complex.cpp) target_compile_definitions(${PROJECT_NAME}_sc PUBLIC WITH_SYSTEMC) + target_compile_definitions(${PROJECT_NAME} PRIVATE CORE_${CORE_NAME}) if(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/incl/iss/arch/tgc_b.h) target_compile_definitions(${PROJECT_NAME}_sc PRIVATE CORE_TGC_B) endif() diff --git a/gen_input/CoreDSL-Instruction-Set-Description b/gen_input/CoreDSL-Instruction-Set-Description index a5f12b0..cf60104 160000 --- a/gen_input/CoreDSL-Instruction-Set-Description +++ b/gen_input/CoreDSL-Instruction-Set-Description @@ -1 +1 @@ -Subproject commit a5f12b0659ba668c2a8651bd23be19bab2bb6f12 +Subproject commit cf601042edaef9661b42a4ab295812d0eca48264 diff --git a/gen_input/templates/interp/CORENAME.cpp.gtl b/gen_input/templates/interp/CORENAME.cpp.gtl index 9dea6c7..c5bb6c2 100644 --- a/gen_input/templates/interp/CORENAME.cpp.gtl +++ b/gen_input/templates/interp/CORENAME.cpp.gtl @@ -155,14 +155,42 @@ protected: template T& pc_assign(T& val){super::ex_info.branch_taken=true; return val;} - inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){super::write_mem(space, addr, data);} - inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){super::write_mem(space, addr, data);} - inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){super::write_mem(space, addr, data);} - inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){super::write_mem(space, addr, data);} + inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } + inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } + inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } + inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } template::type> inline S sext(U from) { auto mask = (1ULL<// calculate next pc value *NEXT_PC = *PC + ${instr.length/8}; // execute instruction + try { <%instr.behavior.eachLine{%>${it} - <%}%>// post execution stuff + <%}%>} catch(...){} + // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, ${idx}); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check @@ -228,7 +258,7 @@ private: uint32_t* PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::PC]); uint32_t* NEXT_PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::NEXT_PC]); *NEXT_PC = *PC + ((instr & 3) == 3 ? 4 : 2); - raise(0, 11); + raise(0, 2); // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast(arch::traits::opcode_e::MAX_OPCODE)); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); diff --git a/incl/iss/arch/tgc_c.h b/incl/iss/arch/tgc_c.h index bf4f958..8fcbe23 100644 --- a/incl/iss/arch/tgc_c.h +++ b/incl/iss/arch/tgc_c.h @@ -125,56 +125,54 @@ template <> struct traits { OR = 35, AND = 36, FENCE = 37, - FENCE_I = 38, - ECALL = 39, - EBREAK = 40, - URET = 41, - SRET = 42, - MRET = 43, - WFI = 44, - SFENCE_VMA = 45, - CSRRW = 46, - CSRRS = 47, - CSRRC = 48, - CSRRWI = 49, - CSRRSI = 50, - CSRRCI = 51, - MUL = 52, - MULH = 53, - MULHSU = 54, - MULHU = 55, - DIV = 56, - DIVU = 57, - REM = 58, - REMU = 59, - CADDI4SPN = 60, - CLW = 61, - CSW = 62, - CADDI = 63, - CNOP = 64, - CJAL = 65, - CLI = 66, - CLUI = 67, - CADDI16SP = 68, - CSRLI = 69, - CSRAI = 70, - CANDI = 71, - CSUB = 72, - CXOR = 73, - COR = 74, - CAND = 75, - CJ = 76, - CBEQZ = 77, - CBNEZ = 78, - CSLLI = 79, - CLWSP = 80, - CMV = 81, - CJR = 82, - CADD = 83, - CJALR = 84, - CEBREAK = 85, - CSWSP = 86, - DII = 87, + ECALL = 38, + EBREAK = 39, + URET = 40, + SRET = 41, + MRET = 42, + WFI = 43, + CSRRW = 44, + CSRRS = 45, + CSRRC = 46, + CSRRWI = 47, + CSRRSI = 48, + CSRRCI = 49, + MUL = 50, + MULH = 51, + MULHSU = 52, + MULHU = 53, + DIV = 54, + DIVU = 55, + REM = 56, + REMU = 57, + CADDI4SPN = 58, + CLW = 59, + CSW = 60, + CADDI = 61, + CNOP = 62, + CJAL = 63, + CLI = 64, + CLUI = 65, + CADDI16SP = 66, + CSRLI = 67, + CSRAI = 68, + CANDI = 69, + CSUB = 70, + CXOR = 71, + COR = 72, + CAND = 73, + CJ = 74, + CBEQZ = 75, + CBNEZ = 76, + CSLLI = 77, + CLWSP = 78, + CMV = 79, + CJR = 80, + CADD = 81, + CJALR = 82, + CEBREAK = 83, + CSWSP = 84, + DII = 85, MAX_OPCODE }; }; diff --git a/src/vm/interp/vm_tgc_c.cpp b/src/vm/interp/vm_tgc_c.cpp index 0da2d3d..0a1da23 100644 --- a/src/vm/interp/vm_tgc_c.cpp +++ b/src/vm/interp/vm_tgc_c.cpp @@ -155,14 +155,42 @@ protected: template T& pc_assign(T& val){super::ex_info.branch_taken=true; return val;} - inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){return super::template read_mem(space, addr);} - inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){super::write_mem(space, addr, data);} - inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){super::write_mem(space, addr, data);} - inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){super::write_mem(space, addr, data);} - inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){super::write_mem(space, addr, data);} + inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){ + auto ret = super::template read_mem(space, addr); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + return ret; + } + inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } + inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } + inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } + inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){ + super::write_mem(space, addr, data); + if(this->template get_reg(traits::TRAP_STATE)) throw 0; + } template::type> inline S sext(U from) { auto mask = (1ULL< instr_descr = {{ + const std::array instr_descr = {{ /* entries are: size, valid value, valid mask, function ptr */ /* instruction LUI */ {32, 0b00000000000000000000000000110111, 0b00000000000000000000000001111111, &this_class::__lui}, @@ -258,9 +286,7 @@ private: /* instruction AND */ {32, 0b00000000000000000111000000110011, 0b11111110000000000111000001111111, &this_class::__and}, /* instruction FENCE */ - {32, 0b00000000000000000000000000001111, 0b11110000000000000111000001111111, &this_class::__fence}, - /* instruction FENCE_I */ - {32, 0b00000000000000000001000000001111, 0b00000000000000000111000001111111, &this_class::__fence_i}, + {32, 0b00000000000000000000000000001111, 0b00000000000000000111000001111111, &this_class::__fence}, /* instruction ECALL */ {32, 0b00000000000000000000000001110011, 0b11111111111111111111111111111111, &this_class::__ecall}, /* instruction EBREAK */ @@ -273,8 +299,6 @@ private: {32, 0b00110000001000000000000001110011, 0b11111111111111111111111111111111, &this_class::__mret}, /* instruction WFI */ {32, 0b00010000010100000000000001110011, 0b11111111111111111111111111111111, &this_class::__wfi}, - /* instruction SFENCE_VMA */ - {32, 0b00010010000000000000000001110011, 0b11111110000000000111111111111111, &this_class::__sfence_vma}, /* instruction CSRRW */ {32, 0b00000000000000000001000001110011, 0b00000000000000000111000001111111, &this_class::__csrrw}, /* instruction CSRRS */ @@ -383,7 +407,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = (int32_t)imm; + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 0); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -416,7 +442,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *PC + (int32_t)imm; + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 1); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -449,10 +477,12 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) *(X+rd) = *PC + 4; pc_assign(*NEXT_PC) = *PC + (int32_t)sext<21>(imm); } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 2); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -486,11 +516,13 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { int32_t new_pc = *(X+rs1) + (int16_t)sext<12>(imm); if(rd != 0) *(X+rd) = *PC + 4; pc_assign(*NEXT_PC) = new_pc & ~ 0x1; } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 3); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -524,7 +556,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(*(X+rs1) == *(X+rs2)) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 4); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -558,7 +592,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(*(X+rs1) != *(X+rs2)) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 5); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -592,7 +628,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if((int32_t)*(X+rs1) < (int32_t)*(X+rs2)) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 6); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -626,7 +664,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if((int32_t)*(X+rs1) >= (int32_t)*(X+rs2)) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 7); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -660,7 +700,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(*(X+rs1) < *(X+rs2)) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 8); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -694,7 +736,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(*(X+rs1) >= *(X+rs2)) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<13>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 9); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -728,10 +772,12 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { int8_t res = (int8_t)readSpace1(traits::MEM, *(X+rs1) + (int16_t)sext<12>(imm)); if(rd != 0) *(X+rd) = res; } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 10); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -765,6 +811,7 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm); if(traits::eei_aligned_addresses && (load_address & 0x1)) raise(0, 4); @@ -773,6 +820,7 @@ private: if(rd != 0) *(X+rd) = res; } } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 11); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -806,6 +854,7 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm); if(traits::eei_aligned_addresses && (load_address & 0x3)) raise(0, 4); @@ -814,6 +863,7 @@ private: if(rd != 0) *(X+rd) = (uint32_t)res; } } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 12); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -847,10 +897,12 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint8_t res = (uint8_t)readSpace1(traits::MEM, *(X+rs1) + (int16_t)sext<12>(imm)); if(rd != 0) *(X+rd) = res; } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 13); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -884,6 +936,7 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t load_address = *(X+rs1) + (int16_t)sext<12>(imm); if(traits::eei_aligned_addresses && (load_address & 0x1)) raise(0, 4); @@ -892,6 +945,7 @@ private: if(rd != 0) *(X+rd) = res; } } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 14); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -925,7 +979,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { writeSpace1(traits::MEM, *(X+rs1) + (int16_t)sext<12>(imm), (int8_t)*(X+rs2)); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 15); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -959,11 +1015,13 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t store_address = *(X+rs1) + (int16_t)sext<12>(imm); if(traits::eei_aligned_addresses && (store_address & 0x1)) raise(0, 6); else writeSpace2(traits::MEM, store_address, (int16_t)*(X+rs2)); } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 16); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -997,11 +1055,13 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t store_address = *(X+rs1) + (int16_t)sext<12>(imm); if(traits::eei_aligned_addresses && (store_address & 0x3)) raise(0, 6); else writeSpace4(traits::MEM, store_address, *(X+rs2)); } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 17); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1035,7 +1095,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) + (int16_t)sext<12>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 18); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1069,7 +1131,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) < (int16_t)sext<12>(imm)? 1 : 0; + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 19); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1103,7 +1167,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) < (int16_t)sext<12>(imm)? 1 : 0; + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 20); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1137,7 +1203,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) ^ (int16_t)sext<12>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 21); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1171,7 +1239,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) | (int16_t)sext<12>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 22); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1205,7 +1275,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) & (int16_t)sext<12>(imm); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 23); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1239,12 +1311,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(shamt > 31) { raise(0, 0); } else { if(rd != 0) *(X+rd) = *(X+rs1) << shamt; } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 24); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1278,12 +1352,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(shamt > 31) { raise(0, 0); } else { if(rd != 0) *(X+rd) = *(X+rs1) >> shamt; } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 25); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1317,12 +1393,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(shamt > 31) { raise(0, 0); } else { if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) >> shamt; } + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 26); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1356,7 +1434,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) + *(X+rs2); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 27); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1390,7 +1470,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) - *(X+rs2); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 28); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1424,7 +1506,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) << (*(X+rs2) & (traits::XLEN - 1)); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 29); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1458,7 +1542,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) < (int32_t)*(X+rs2)? 1 : 0; + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 30); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1492,7 +1578,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = (uint32_t)*(X+rs1) < (uint32_t)*(X+rs2)? 1 : 0; + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 31); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1526,7 +1614,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) ^ *(X+rs2); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 32); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1560,7 +1650,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1)); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 33); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1594,7 +1686,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = (int32_t)*(X+rs1) >> (*(X+rs2) & (traits::XLEN - 1)); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 34); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1628,7 +1722,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) | *(X+rs2); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 35); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1662,7 +1758,9 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { if(rd != 0) *(X+rd) = *(X+rs1) & *(X+rs2); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 36); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1682,11 +1780,12 @@ private: uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t succ = ((bit_sub<20,4>(instr))); uint8_t pred = ((bit_sub<24,4>(instr))); + uint8_t fm = ((bit_sub<28,4>(instr))); if(this->disass_enabled){ /* generate console output when executing the command */ auto mnemonic = fmt::format( - "{mnemonic:10} {pred}, {succ}, {rs1}, {rd}", fmt::arg("mnemonic", "fence"), - fmt::arg("pred", pred), fmt::arg("succ", succ), fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd))); + "{mnemonic:10} {pred}, {succ} ({fm} , {rs1}, {rd})", fmt::arg("mnemonic", "fence"), + fmt::arg("pred", pred), fmt::arg("succ", succ), fmt::arg("fm", fm), fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd))); this->core.disass_output(pc.val, mnemonic); } @@ -1696,7 +1795,9 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { writeSpace1(traits::FENCE, traits::fence, pred << 4 | succ); + } catch(...){} // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 37); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); @@ -1708,43 +1809,10 @@ private: return pc; } - /* instruction 38: FENCE_I */ - compile_ret_t __fence_i(virt_addr_t& pc, code_word_t instr){ - // pre execution stuff - this->do_sync(PRE_SYNC, 38); - uint8_t rd = ((bit_sub<7,5>(instr))); - uint8_t rs1 = ((bit_sub<15,5>(instr))); - uint16_t imm = ((bit_sub<20,12>(instr))); - if(this->disass_enabled){ - /* generate console output when executing the command */ - auto mnemonic = fmt::format( - "{mnemonic:10} {rs1}, {rd}, {imm}", fmt::arg("mnemonic", "fence_i"), - fmt::arg("rs1", name(rs1)), fmt::arg("rd", name(rd)), fmt::arg("imm", imm)); - this->core.disass_output(pc.val, mnemonic); - - } - // prepare execution - uint32_t* PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::PC]); - uint32_t* NEXT_PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::NEXT_PC]); - // used registers// calculate next pc value - *NEXT_PC = *PC + 4; - // execute instruction - writeSpace2(traits::FENCE, traits::fencei, imm); - // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 38); - auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); - // trap check - if(*trap_state!=0){ - super::core.enter_trap(*trap_state, pc.val); - } - pc.val=*NEXT_PC; - return pc; - } - - /* instruction 39: ECALL */ + /* instruction 38: ECALL */ compile_ret_t __ecall(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 39); + this->do_sync(PRE_SYNC, 38); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "ecall"); @@ -1756,9 +1824,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { raise(0, 11); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 39); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 38); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -1768,10 +1838,10 @@ private: return pc; } - /* instruction 40: EBREAK */ + /* instruction 39: EBREAK */ compile_ret_t __ebreak(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 40); + this->do_sync(PRE_SYNC, 39); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "ebreak"); @@ -1783,9 +1853,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { raise(0, 3); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 40); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 39); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -1795,10 +1867,10 @@ private: return pc; } - /* instruction 41: URET */ + /* instruction 40: URET */ compile_ret_t __uret(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 41); + this->do_sync(PRE_SYNC, 40); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "uret"); @@ -1810,9 +1882,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { leave(0); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 41); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 40); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -1822,10 +1896,10 @@ private: return pc; } - /* instruction 42: SRET */ + /* instruction 41: SRET */ compile_ret_t __sret(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 42); + this->do_sync(PRE_SYNC, 41); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "sret"); @@ -1837,9 +1911,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { leave(1); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 42); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 41); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -1849,10 +1925,10 @@ private: return pc; } - /* instruction 43: MRET */ + /* instruction 42: MRET */ compile_ret_t __mret(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 43); + this->do_sync(PRE_SYNC, 42); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "mret"); @@ -1864,9 +1940,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { leave(3); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 43); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 42); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -1876,10 +1954,10 @@ private: return pc; } - /* instruction 44: WFI */ + /* instruction 43: WFI */ compile_ret_t __wfi(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 44); + this->do_sync(PRE_SYNC, 43); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "wfi"); @@ -1891,9 +1969,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { wait(1); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 44); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 43); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -1903,45 +1983,10 @@ private: return pc; } - /* instruction 45: SFENCE_VMA */ - compile_ret_t __sfence_vma(virt_addr_t& pc, code_word_t instr){ - // pre execution stuff - this->do_sync(PRE_SYNC, 45); - uint8_t rs1 = ((bit_sub<15,5>(instr))); - uint8_t rs2 = ((bit_sub<20,5>(instr))); - if(this->disass_enabled){ - /* generate console output when executing the command */ - auto mnemonic = fmt::format( - "{mnemonic:10} {rs2}, {rs1}", fmt::arg("mnemonic", "sfence_vma"), - fmt::arg("rs2", name(rs2)), fmt::arg("rs1", rs1)); - this->core.disass_output(pc.val, mnemonic); - - } - // prepare execution - uint32_t* PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::PC]); - uint32_t* NEXT_PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::NEXT_PC]); - // used registers// calculate next pc value - *NEXT_PC = *PC + 4; - // execute instruction - { - writeSpace4(traits::FENCE, traits::fencevmal, (uint32_t)rs1); - writeSpace4(traits::FENCE, traits::fencevmau, (uint32_t)rs2); - } - // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 45); - auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); - // trap check - if(*trap_state!=0){ - super::core.enter_trap(*trap_state, pc.val); - } - pc.val=*NEXT_PC; - return pc; - } - - /* instruction 46: CSRRW */ + /* instruction 44: CSRRW */ compile_ret_t __csrrw(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 46); + this->do_sync(PRE_SYNC, 44); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint16_t csr = ((bit_sub<20,12>(instr))); @@ -1960,6 +2005,7 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t rs_val = *(X+rs1); if(rd != 0) { @@ -1971,8 +2017,9 @@ private: writeSpace4(traits::CSR, csr, rs_val); } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 46); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 44); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -1982,10 +2029,10 @@ private: return pc; } - /* instruction 47: CSRRS */ + /* instruction 45: CSRRS */ compile_ret_t __csrrs(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 47); + this->do_sync(PRE_SYNC, 45); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint16_t csr = ((bit_sub<20,12>(instr))); @@ -2004,14 +2051,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t xrd = readSpace4(traits::CSR, csr); uint32_t xrs1 = *(X+rs1); - if(rd != 0) *(X+rd) = xrd; if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd | xrs1); + if(rd != 0) *(X+rd) = xrd; } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 47); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 45); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2021,10 +2070,10 @@ private: return pc; } - /* instruction 48: CSRRC */ + /* instruction 46: CSRRC */ compile_ret_t __csrrc(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 48); + this->do_sync(PRE_SYNC, 46); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint16_t csr = ((bit_sub<20,12>(instr))); @@ -2043,14 +2092,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t xrd = readSpace4(traits::CSR, csr); uint32_t xrs1 = *(X+rs1); - if(rd != 0) *(X+rd) = xrd; if(rs1 != 0) writeSpace4(traits::CSR, csr, xrd & ~ xrs1); + if(rd != 0) *(X+rd) = xrd; } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 48); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 46); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2060,10 +2111,10 @@ private: return pc; } - /* instruction 49: CSRRWI */ + /* instruction 47: CSRRWI */ compile_ret_t __csrrwi(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 49); + this->do_sync(PRE_SYNC, 47); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t zimm = ((bit_sub<15,5>(instr))); uint16_t csr = ((bit_sub<20,12>(instr))); @@ -2082,12 +2133,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) *(X+rd) = readSpace4(traits::CSR, csr); writeSpace4(traits::CSR, csr, (uint32_t)zimm); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 49); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 47); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2097,10 +2150,10 @@ private: return pc; } - /* instruction 50: CSRRSI */ + /* instruction 48: CSRRSI */ compile_ret_t __csrrsi(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 50); + this->do_sync(PRE_SYNC, 48); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t zimm = ((bit_sub<15,5>(instr))); uint16_t csr = ((bit_sub<20,12>(instr))); @@ -2119,13 +2172,15 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t res = readSpace4(traits::CSR, csr); if(zimm != 0) writeSpace4(traits::CSR, csr, res | (uint32_t)zimm); if(rd != 0) *(X+rd) = res; } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 50); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 48); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2135,10 +2190,10 @@ private: return pc; } - /* instruction 51: CSRRCI */ + /* instruction 49: CSRRCI */ compile_ret_t __csrrci(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 51); + this->do_sync(PRE_SYNC, 49); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t zimm = ((bit_sub<15,5>(instr))); uint16_t csr = ((bit_sub<20,12>(instr))); @@ -2157,13 +2212,15 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { uint32_t res = readSpace4(traits::CSR, csr); - if(rd != 0) *(X+rd) = res; if(zimm != 0) writeSpace4(traits::CSR, csr, res & ~ ((uint32_t)zimm)); + if(rd != 0) *(X+rd) = res; } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 51); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 49); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2173,10 +2230,10 @@ private: return pc; } - /* instruction 52: MUL */ + /* instruction 50: MUL */ compile_ret_t __mul(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 52); + this->do_sync(PRE_SYNC, 50); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2195,14 +2252,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { int64_t res = (int64_t)(int32_t)*(X+rs1) * (int64_t)(int32_t)*(X+rs2); *(X+rd) = (uint32_t)res; } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 52); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 50); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2212,10 +2271,10 @@ private: return pc; } - /* instruction 53: MULH */ + /* instruction 51: MULH */ compile_ret_t __mulh(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 53); + this->do_sync(PRE_SYNC, 51); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2234,14 +2293,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { int64_t res = (int64_t)(int32_t)*(X+rs1) * (int64_t)(int32_t)*(X+rs2); *(X+rd) = (uint32_t)(res >> traits::XLEN); } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 53); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 51); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2251,10 +2312,10 @@ private: return pc; } - /* instruction 54: MULHSU */ + /* instruction 52: MULHSU */ compile_ret_t __mulhsu(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 54); + this->do_sync(PRE_SYNC, 52); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2273,14 +2334,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { int64_t res = (int64_t)(int32_t)*(X+rs1) * (uint64_t)*(X+rs2); *(X+rd) = (uint32_t)(res >> traits::XLEN); } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 54); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 52); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2290,10 +2353,10 @@ private: return pc; } - /* instruction 55: MULHU */ + /* instruction 53: MULHU */ compile_ret_t __mulhu(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 55); + this->do_sync(PRE_SYNC, 53); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2312,14 +2375,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { uint64_t res = (uint64_t)*(X+rs1) * (uint64_t)*(X+rs2); *(X+rd) = (uint32_t)(res >> traits::XLEN); } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 55); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 53); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2329,10 +2394,10 @@ private: return pc; } - /* instruction 56: DIV */ + /* instruction 54: DIV */ compile_ret_t __div(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 56); + this->do_sync(PRE_SYNC, 54); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2351,6 +2416,7 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { if(*(X+rs2) != 0) { @@ -2361,8 +2427,9 @@ private: else *(X+rd) = - 1; } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 56); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 54); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2372,10 +2439,10 @@ private: return pc; } - /* instruction 57: DIVU */ + /* instruction 55: DIVU */ compile_ret_t __divu(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 57); + this->do_sync(PRE_SYNC, 55); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2394,14 +2461,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { if(*(X+rs2) != 0) *(X+rd) = *(X+rs1) / *(X+rs2); else *(X+rd) = - 1; } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 57); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 55); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2411,10 +2480,10 @@ private: return pc; } - /* instruction 58: REM */ + /* instruction 56: REM */ compile_ret_t __rem(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 58); + this->do_sync(PRE_SYNC, 56); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2433,6 +2502,7 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { if(*(X+rs2) != 0) { @@ -2443,8 +2513,9 @@ private: else *(X+rd) = *(X+rs1); } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 58); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 56); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2454,10 +2525,10 @@ private: return pc; } - /* instruction 59: REMU */ + /* instruction 57: REMU */ compile_ret_t __remu(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 59); + this->do_sync(PRE_SYNC, 57); uint8_t rd = ((bit_sub<7,5>(instr))); uint8_t rs1 = ((bit_sub<15,5>(instr))); uint8_t rs2 = ((bit_sub<20,5>(instr))); @@ -2476,14 +2547,16 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 4; // execute instruction + try { { if(rd != 0) { if(*(X+rs2) != 0) *(X+rd) = *(X+rs1) % *(X+rs2); else *(X+rd) = *(X+rs1); } } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 59); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 57); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2493,10 +2566,10 @@ private: return pc; } - /* instruction 60: CADDI4SPN */ + /* instruction 58: CADDI4SPN */ compile_ret_t __caddi4spn(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 60); + this->do_sync(PRE_SYNC, 58); uint8_t rd = ((bit_sub<2,3>(instr))); uint16_t imm = ((bit_sub<5,1>(instr) << 3) | (bit_sub<6,1>(instr) << 2) | (bit_sub<7,4>(instr) << 6) | (bit_sub<11,2>(instr) << 4)); if(this->disass_enabled){ @@ -2514,12 +2587,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { if(imm == 0) raise(0, 2); *(X+(rd + 8)) = *(X+2) + imm; } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 60); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 58); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2529,10 +2604,10 @@ private: return pc; } - /* instruction 61: CLW */ + /* instruction 59: CLW */ compile_ret_t __clw(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 61); + this->do_sync(PRE_SYNC, 59); uint8_t rd = ((bit_sub<2,3>(instr))); uint8_t uimm = ((bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 2) | (bit_sub<10,3>(instr) << 3)); uint8_t rs1 = ((bit_sub<7,3>(instr))); @@ -2551,13 +2626,15 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t load_address = *(X+(rs1 + 8)) + uimm; if(traits::eei_aligned_addresses && (load_address & 0x3)) raise(0, 4); else *(X+(rd + 8)) = (int32_t)readSpace4(traits::MEM, load_address); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 61); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 59); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2567,10 +2644,10 @@ private: return pc; } - /* instruction 62: CSW */ + /* instruction 60: CSW */ compile_ret_t __csw(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 62); + this->do_sync(PRE_SYNC, 60); uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t uimm = ((bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 2) | (bit_sub<10,3>(instr) << 3)); uint8_t rs1 = ((bit_sub<7,3>(instr))); @@ -2589,13 +2666,15 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t load_address = *(X+(rs1 + 8)) + uimm; if(traits::eei_aligned_addresses && (load_address & 0x3)) raise(0, 6); else writeSpace4(traits::MEM, load_address, *(X+(rs2 + 8))); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 62); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 60); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2605,10 +2684,10 @@ private: return pc; } - /* instruction 63: CADDI */ + /* instruction 61: CADDI */ compile_ret_t __caddi(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 63); + this->do_sync(PRE_SYNC, 61); uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -2626,9 +2705,11 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { *(X+rs1) = *(X+rs1) + (int8_t)sext<6>(imm); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 63); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 61); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2638,10 +2719,10 @@ private: return pc; } - /* instruction 64: CNOP */ + /* instruction 62: CNOP */ compile_ret_t __cnop(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 64); + this->do_sync(PRE_SYNC, 62); uint8_t nzimm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); if(this->disass_enabled){ /* generate console output when executing the command */ @@ -2654,10 +2735,12 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 64); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 62); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2667,10 +2750,10 @@ private: return pc; } - /* instruction 65: CJAL */ + /* instruction 63: CJAL */ compile_ret_t __cjal(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 65); + this->do_sync(PRE_SYNC, 63); uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11)); if(this->disass_enabled){ /* generate console output when executing the command */ @@ -2687,12 +2770,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { *(X+1) = *PC + 2; pc_assign(*NEXT_PC) = *PC + (int16_t)sext<12>(imm); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 65); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 63); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2702,10 +2787,10 @@ private: return pc; } - /* instruction 66: CLI */ + /* instruction 64: CLI */ compile_ret_t __cli(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 66); + this->do_sync(PRE_SYNC, 64); uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -2723,11 +2808,13 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { if(rd != 0) *(X+rd) = (uint32_t)(int32_t)sext<6>(imm); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 66); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 64); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2737,10 +2824,10 @@ private: return pc; } - /* instruction 67: CLUI */ + /* instruction 65: CLUI */ compile_ret_t __clui(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 67); + this->do_sync(PRE_SYNC, 65); uint32_t imm = ((bit_sub<2,5>(instr) << 12) | (bit_sub<12,1>(instr) << 17)); uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -2758,13 +2845,15 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { if(rd == 0) raise(0, 2); if(imm == 0) raise(0, 2); *(X+rd) = (int32_t)sext<18>(imm); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 67); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 65); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2774,10 +2863,10 @@ private: return pc; } - /* instruction 68: CADDI16SP */ + /* instruction 66: CADDI16SP */ compile_ret_t __caddi16sp(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 68); + this->do_sync(PRE_SYNC, 66); uint16_t nzimm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 7) | (bit_sub<5,1>(instr) << 6) | (bit_sub<6,1>(instr) << 4) | (bit_sub<12,1>(instr) << 9)); if(this->disass_enabled){ /* generate console output when executing the command */ @@ -2794,10 +2883,12 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { if(nzimm) *(X+2) = *(X+2) + (int16_t)sext<10>(nzimm); else raise(0, 2); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 68); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 66); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2807,10 +2898,10 @@ private: return pc; } - /* instruction 69: CSRLI */ + /* instruction 67: CSRLI */ compile_ret_t __csrli(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 69); + this->do_sync(PRE_SYNC, 67); uint8_t shamt = ((bit_sub<2,5>(instr))); uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -2828,12 +2919,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t rs1_idx = rs1 + 8; *(X+rs1_idx) = *(X+rs1_idx) >> shamt; } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 69); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 67); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2843,10 +2936,10 @@ private: return pc; } - /* instruction 70: CSRAI */ + /* instruction 68: CSRAI */ compile_ret_t __csrai(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 70); + this->do_sync(PRE_SYNC, 68); uint8_t shamt = ((bit_sub<2,5>(instr))); uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -2864,6 +2957,7 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { if(shamt) { uint32_t rs1_idx = rs1 + 8; *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >> shamt; @@ -2872,8 +2966,9 @@ private: uint32_t rs1_idx = rs1 + 8; *(X+rs1_idx) = ((int32_t)*(X+rs1_idx)) >> 64; } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 70); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 68); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2883,10 +2978,10 @@ private: return pc; } - /* instruction 71: CANDI */ + /* instruction 69: CANDI */ compile_ret_t __candi(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 71); + this->do_sync(PRE_SYNC, 69); uint8_t imm = ((bit_sub<2,5>(instr)) | (bit_sub<12,1>(instr) << 5)); uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -2904,12 +2999,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t rs1_idx = rs1 + 8; *(X+rs1_idx) = *(X+rs1_idx) & (int8_t)sext<6>(imm); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 71); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 69); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2919,10 +3016,10 @@ private: return pc; } - /* instruction 72: CSUB */ + /* instruction 70: CSUB */ compile_ret_t __csub(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 72); + this->do_sync(PRE_SYNC, 70); uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -2940,12 +3037,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) - *(X+(rs2 + 8)); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 72); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 70); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2955,10 +3054,10 @@ private: return pc; } - /* instruction 73: CXOR */ + /* instruction 71: CXOR */ compile_ret_t __cxor(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 73); + this->do_sync(PRE_SYNC, 71); uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -2976,12 +3075,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) ^ *(X+(rs2 + 8)); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 73); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 71); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -2991,10 +3092,10 @@ private: return pc; } - /* instruction 74: COR */ + /* instruction 72: COR */ compile_ret_t __cor(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 74); + this->do_sync(PRE_SYNC, 72); uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -3012,12 +3113,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) | *(X+(rs2 + 8)); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 74); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 72); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3027,10 +3130,10 @@ private: return pc; } - /* instruction 75: CAND */ + /* instruction 73: CAND */ compile_ret_t __cand(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 75); + this->do_sync(PRE_SYNC, 73); uint8_t rs2 = ((bit_sub<2,3>(instr))); uint8_t rd = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -3048,12 +3151,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t rd_idx = rd + 8; *(X+rd_idx) = *(X+rd_idx) & *(X+(rs2 + 8)); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 75); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 73); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3063,10 +3168,10 @@ private: return pc; } - /* instruction 76: CJ */ + /* instruction 74: CJ */ compile_ret_t __cj(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 76); + this->do_sync(PRE_SYNC, 74); uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,3>(instr) << 1) | (bit_sub<6,1>(instr) << 7) | (bit_sub<7,1>(instr) << 6) | (bit_sub<8,1>(instr) << 10) | (bit_sub<9,2>(instr) << 8) | (bit_sub<11,1>(instr) << 4) | (bit_sub<12,1>(instr) << 11)); if(this->disass_enabled){ /* generate console output when executing the command */ @@ -3082,9 +3187,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { pc_assign(*NEXT_PC) = *PC + (int16_t)sext<12>(imm); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 76); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 74); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3094,10 +3201,10 @@ private: return pc; } - /* instruction 77: CBEQZ */ + /* instruction 75: CBEQZ */ compile_ret_t __cbeqz(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 77); + this->do_sync(PRE_SYNC, 75); uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8)); uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -3115,9 +3222,11 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { if(*(X+(rs1 + 8)) == 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 77); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 75); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3127,10 +3236,10 @@ private: return pc; } - /* instruction 78: CBNEZ */ + /* instruction 76: CBNEZ */ compile_ret_t __cbnez(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 78); + this->do_sync(PRE_SYNC, 76); uint16_t imm = ((bit_sub<2,1>(instr) << 5) | (bit_sub<3,2>(instr) << 1) | (bit_sub<5,2>(instr) << 6) | (bit_sub<10,2>(instr) << 3) | (bit_sub<12,1>(instr) << 8)); uint8_t rs1 = ((bit_sub<7,3>(instr))); if(this->disass_enabled){ @@ -3148,9 +3257,11 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { if(*(X+(rs1 + 8)) != 0) pc_assign(*NEXT_PC) = *PC + (int16_t)sext<9>(imm); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 78); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 76); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3160,10 +3271,10 @@ private: return pc; } - /* instruction 79: CSLLI */ + /* instruction 77: CSLLI */ compile_ret_t __cslli(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 79); + this->do_sync(PRE_SYNC, 77); uint8_t nzuimm = ((bit_sub<2,5>(instr))); uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -3181,9 +3292,11 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { if(nzuimm) *(X+rs1) = *(X+rs1) << nzuimm; + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 79); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 77); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3193,10 +3306,10 @@ private: return pc; } - /* instruction 80: CLWSP */ + /* instruction 78: CLWSP */ compile_ret_t __clwsp(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 80); + this->do_sync(PRE_SYNC, 78); uint8_t uimm = ((bit_sub<2,2>(instr) << 6) | (bit_sub<4,3>(instr) << 2) | (bit_sub<12,1>(instr) << 5)); uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -3214,13 +3327,15 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { if(rd) { uint32_t offs = *(X+2) + uimm; *(X+rd) = (int32_t)readSpace4(traits::MEM, offs); } else raise(0, 2); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 80); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 78); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3230,10 +3345,10 @@ private: return pc; } - /* instruction 81: CMV */ + /* instruction 79: CMV */ compile_ret_t __cmv(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 81); + this->do_sync(PRE_SYNC, 79); uint8_t rs2 = ((bit_sub<2,5>(instr))); uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -3251,9 +3366,11 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { *(X+rd) = *(X+rs2); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 81); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 79); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3263,10 +3380,10 @@ private: return pc; } - /* instruction 82: CJR */ + /* instruction 80: CJR */ compile_ret_t __cjr(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 82); + this->do_sync(PRE_SYNC, 80); uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate console output when executing the command */ @@ -3283,10 +3400,12 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { if(rs1) pc_assign(*NEXT_PC) = *(X+rs1); else raise(0, 2); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 82); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 80); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3296,10 +3415,10 @@ private: return pc; } - /* instruction 83: CADD */ + /* instruction 81: CADD */ compile_ret_t __cadd(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 83); + this->do_sync(PRE_SYNC, 81); uint8_t rs2 = ((bit_sub<2,5>(instr))); uint8_t rd = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ @@ -3317,9 +3436,11 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { *(X+rd) = *(X+rd) + *(X+rs2); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 83); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 81); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3329,10 +3450,10 @@ private: return pc; } - /* instruction 84: CJALR */ + /* instruction 82: CJALR */ compile_ret_t __cjalr(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 84); + this->do_sync(PRE_SYNC, 82); uint8_t rs1 = ((bit_sub<7,5>(instr))); if(this->disass_enabled){ /* generate console output when executing the command */ @@ -3349,12 +3470,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { *(X+1) = *PC + 2; pc_assign(*NEXT_PC) = *(X+rs1); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 84); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 82); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3364,10 +3487,10 @@ private: return pc; } - /* instruction 85: CEBREAK */ + /* instruction 83: CEBREAK */ compile_ret_t __cebreak(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 85); + this->do_sync(PRE_SYNC, 83); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "cebreak"); @@ -3379,9 +3502,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { raise(0, 3); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 85); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 83); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3391,10 +3516,10 @@ private: return pc; } - /* instruction 86: CSWSP */ + /* instruction 84: CSWSP */ compile_ret_t __cswsp(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 86); + this->do_sync(PRE_SYNC, 84); uint8_t rs2 = ((bit_sub<2,5>(instr))); uint8_t uimm = ((bit_sub<7,2>(instr) << 6) | (bit_sub<9,4>(instr) << 2)); if(this->disass_enabled){ @@ -3412,12 +3537,14 @@ private: uint32_t* X = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::X0]);// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { { uint32_t offs = *(X+2) + uimm; writeSpace4(traits::MEM, offs, (uint32_t)*(X+rs2)); } + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 86); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 84); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3427,10 +3554,10 @@ private: return pc; } - /* instruction 87: DII */ + /* instruction 85: DII */ compile_ret_t __dii(virt_addr_t& pc, code_word_t instr){ // pre execution stuff - this->do_sync(PRE_SYNC, 87); + this->do_sync(PRE_SYNC, 85); if(this->disass_enabled){ /* generate console output when executing the command */ this->core.disass_output(pc.val, "dii"); @@ -3442,9 +3569,11 @@ private: // used registers// calculate next pc value *NEXT_PC = *PC + 2; // execute instruction + try { raise(0, 2); + } catch(...){} // post execution stuff - if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 87); + if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, 85); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]); // trap check if(*trap_state!=0){ @@ -3462,7 +3591,7 @@ private: uint32_t* PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::PC]); uint32_t* NEXT_PC = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::NEXT_PC]); *NEXT_PC = *PC + ((instr & 3) == 3 ? 4 : 2); - raise(0, 11); + raise(0, 2); // post execution stuff if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, static_cast(arch::traits::opcode_e::MAX_OPCODE)); auto* trap_state = reinterpret_cast(this->regs_base_ptr+arch::traits::reg_byte_offsets[arch::traits::TRAP_STATE]);