remove tgf_b code generation
This commit is contained in:
parent
c171e3c1ba
commit
40db74ce02
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@ -1,6 +1,6 @@
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cmake_minimum_required(VERSION 3.12)
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project("tgfs" VERSION 1.0.0)
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project(tgfs VERSION 1.0.0)
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include(GNUInstallDirs)
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@ -30,16 +30,16 @@ add_subdirectory(softfloat)
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FILE(GLOB RiscVSCHeaders ${CMAKE_CURRENT_SOURCE_DIR}/incl/sysc/*.h ${CMAKE_CURRENT_SOURCE_DIR}/incl/sysc/*/*.h)
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set(LIB_HEADERS tgfscVSCHeaders} )
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set(LIB_SOURCES
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src/iss/tgf_b.cpp
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src/iss/tgf_c.cpp
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src/vm/fp_functions.cpp
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src/vm/tcc/vm_tgf_b.cpp
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src/vm/tcc/vm_tgf_c.cpp
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src/vm/interp/vm_tgf_b.cpp
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src/vm/interp/vm_tgf_c.cpp
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src/plugin/instruction_count.cpp
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src/plugin/cycle_estimate.cpp
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)
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if(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/src/iss/tgf_b.cpp)
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set(LIB_SOURCES ${LIB_SOURCES} src/iss/tgf_b.cpp src/vm/interp/vm_tgf_b.cpp)
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endif()
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if(EXISTS ${CMAKE_CURRENT_SOURCE_DIR}/src/iss/tgf_c.cpp)
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set(LIB_SOURCES ${LIB_SOURCES} src/iss/tgf_c.cpp src/vm/interp/vm_tgf_c.cpp)
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endif()
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if(WITH_LLVM)
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set(LIB_SOURCES ${LIB_SOURCES}
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src/vm/llvm/fp_impl.cpp
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@ -51,6 +51,7 @@ endif()
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# Define the library
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add_library(tgfs SHARED ${LIB_SOURCES})
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# list code gen dependencies
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add_dependencies(tgfs TGF_B_src)
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add_dependencies(tgfs TGF_C_src)
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target_compile_options(tgfs PRIVATE -Wno-shift-count-overflow)
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@ -0,0 +1 @@
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/tgf_b.h
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@ -1,240 +0,0 @@
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/*******************************************************************************
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* Copyright (C) 2017 - 2021 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************/
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#ifndef _TGF_B_H_
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#define _TGF_B_H_
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#include <array>
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#include <iss/arch/traits.h>
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#include <iss/arch_if.h>
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#include <iss/vm_if.h>
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namespace iss {
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namespace arch {
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struct tgf_b;
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template <> struct traits<tgf_b> {
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constexpr static char const* const core_type = "TGF_B";
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static constexpr std::array<const char*, 35> reg_names{
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{"X0", "X1", "X2", "X3", "X4", "X5", "X6", "X7", "X8", "X9", "X10", "X11", "X12", "X13", "X14", "X15", "X16", "X17", "X18", "X19", "X20", "X21", "X22", "X23", "X24", "X25", "X26", "X27", "X28", "X29", "X30", "X31", "PC", "NEXT_PC", "PRIV"}};
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static constexpr std::array<const char*, 35> reg_aliases{
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{"X0", "X1", "X2", "X3", "X4", "X5", "X6", "X7", "X8", "X9", "X10", "X11", "X12", "X13", "X14", "X15", "X16", "X17", "X18", "X19", "X20", "X21", "X22", "X23", "X24", "X25", "X26", "X27", "X28", "X29", "X30", "X31", "PC", "NEXT_PC", "PRIV"}};
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enum constants {XLEN=32, PCLEN=32, MISA_VAL=0b1000000000000000000000100000000, PGSIZE=0x1000, PGMASK=0b111111111111, CSR_SIZE=4096, fence=0, fencei=1, fencevmal=2, fencevmau=3};
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constexpr static unsigned FP_REGS_SIZE = 0;
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enum reg_e {
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X0, X1, X2, X3, X4, X5, X6, X7, X8, X9, X10, X11, X12, X13, X14, X15, X16, X17, X18, X19, X20, X21, X22, X23, X24, X25, X26, X27, X28, X29, X30, X31, PC, NEXT_PC, PRIV, NUM_REGS,
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TRAP_STATE=NUM_REGS,
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PENDING_TRAP,
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ICOUNT
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};
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using reg_t = uint32_t;
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using addr_t = uint32_t;
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using code_word_t = uint32_t; //TODO: check removal
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using virt_addr_t = iss::typed_addr_t<iss::address_type::VIRTUAL>;
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using phys_addr_t = iss::typed_addr_t<iss::address_type::PHYSICAL>;
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static constexpr std::array<const uint32_t, 38> reg_bit_widths{
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{32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,8,32,32,64}};
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static constexpr std::array<const uint32_t, 38> reg_byte_offsets{
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{0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60,64,68,72,76,80,84,88,92,96,100,104,108,112,116,120,124,128,132,136,137,141,145}};
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static const uint64_t addr_mask = (reg_t(1) << (XLEN - 1)) | ((reg_t(1) << (XLEN - 1)) - 1);
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enum sreg_flag_e { FLAGS };
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enum mem_type_e { MEM, CSR, FENCE, RES };
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enum class opcode_e : unsigned short {
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LUI = 0,
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AUIPC = 1,
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JAL = 2,
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JALR = 3,
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BEQ = 4,
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BNE = 5,
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BLT = 6,
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BGE = 7,
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BLTU = 8,
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BGEU = 9,
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LB = 10,
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LH = 11,
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LW = 12,
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LBU = 13,
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LHU = 14,
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SB = 15,
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SH = 16,
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SW = 17,
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ADDI = 18,
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SLTI = 19,
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SLTIU = 20,
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XORI = 21,
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ORI = 22,
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ANDI = 23,
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SLLI = 24,
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SRLI = 25,
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SRAI = 26,
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ADD = 27,
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SUB = 28,
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SLL = 29,
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SLT = 30,
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SLTU = 31,
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XOR = 32,
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SRL = 33,
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SRA = 34,
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OR = 35,
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AND = 36,
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FENCE = 37,
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FENCE_I = 38,
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ECALL = 39,
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EBREAK = 40,
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URET = 41,
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SRET = 42,
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MRET = 43,
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WFI = 44,
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SFENCE_VMA = 45,
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CSRRW = 46,
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CSRRS = 47,
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CSRRC = 48,
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CSRRWI = 49,
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CSRRSI = 50,
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CSRRCI = 51,
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MAX_OPCODE
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};
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};
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struct tgf_b: public arch_if {
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using virt_addr_t = typename traits<tgf_b>::virt_addr_t;
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using phys_addr_t = typename traits<tgf_b>::phys_addr_t;
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using reg_t = typename traits<tgf_b>::reg_t;
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using addr_t = typename traits<tgf_b>::addr_t;
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tgf_b();
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~tgf_b();
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void reset(uint64_t address=0) override;
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uint8_t* get_regs_base_ptr() override;
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/// deprecated
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void get_reg(short idx, std::vector<uint8_t>& value) override {}
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void set_reg(short idx, const std::vector<uint8_t>& value) override {}
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/// deprecated
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bool get_flag(int flag) override {return false;}
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void set_flag(int, bool value) override {};
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/// deprecated
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void update_flags(operations op, uint64_t opr1, uint64_t opr2) override {};
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inline uint64_t get_icount() { return reg.icount; }
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inline bool should_stop() { return interrupt_sim; }
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inline uint64_t stop_code() { return interrupt_sim; }
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inline phys_addr_t v2p(const iss::addr_t& addr){
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if (addr.space != traits<tgf_b>::MEM || addr.type == iss::address_type::PHYSICAL ||
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addr_mode[static_cast<uint16_t>(addr.access)&0x3]==address_type::PHYSICAL) {
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return phys_addr_t(addr.access, addr.space, addr.val&traits<tgf_b>::addr_mask);
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} else
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return virt2phys(addr);
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}
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virtual phys_addr_t virt2phys(const iss::addr_t& addr);
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virtual iss::sync_type needed_sync() const { return iss::NO_SYNC; }
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inline uint32_t get_last_branch() { return reg.last_branch; }
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protected:
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struct TGF_B_regs {
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uint32_t X0 = 0;
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uint32_t X1 = 0;
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uint32_t X2 = 0;
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uint32_t X3 = 0;
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uint32_t X4 = 0;
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uint32_t X5 = 0;
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uint32_t X6 = 0;
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uint32_t X7 = 0;
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uint32_t X8 = 0;
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uint32_t X9 = 0;
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uint32_t X10 = 0;
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uint32_t X11 = 0;
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uint32_t X12 = 0;
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uint32_t X13 = 0;
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uint32_t X14 = 0;
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uint32_t X15 = 0;
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uint32_t X16 = 0;
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uint32_t X17 = 0;
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uint32_t X18 = 0;
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uint32_t X19 = 0;
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uint32_t X20 = 0;
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uint32_t X21 = 0;
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uint32_t X22 = 0;
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uint32_t X23 = 0;
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uint32_t X24 = 0;
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uint32_t X25 = 0;
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uint32_t X26 = 0;
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uint32_t X27 = 0;
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uint32_t X28 = 0;
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uint32_t X29 = 0;
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uint32_t X30 = 0;
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uint32_t X31 = 0;
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uint32_t PC = 0;
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uint32_t NEXT_PC = 0;
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uint8_t PRIV = 0;
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uint32_t trap_state = 0, pending_trap = 0, machine_state = 0, last_branch = 0;
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uint64_t icount = 0;
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} reg;
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std::array<address_type, 4> addr_mode;
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uint64_t interrupt_sim=0;
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uint32_t get_fcsr(){return 0;}
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void set_fcsr(uint32_t val){}
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};
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}
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}
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#endif /* _TGF_B_H_ */
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@ -0,0 +1 @@
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/tgf_b.cpp
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@ -1,69 +0,0 @@
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/*******************************************************************************
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* Copyright (C) 2017 - 2020 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************/
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#include "util/ities.h"
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#include <util/logging.h>
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#include <iss/arch/tgf_b.h>
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#include <cstdio>
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#include <cstring>
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#include <fstream>
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using namespace iss::arch;
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constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_b>::reg_names;
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constexpr std::array<const char*, 35> iss::arch::traits<iss::arch::tgf_b>::reg_aliases;
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constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_b>::reg_bit_widths;
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constexpr std::array<const uint32_t, 38> iss::arch::traits<iss::arch::tgf_b>::reg_byte_offsets;
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tgf_b::tgf_b() {
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reg.icount = 0;
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}
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tgf_b::~tgf_b() = default;
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void tgf_b::reset(uint64_t address) {
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for(size_t i=0; i<traits<tgf_b>::NUM_REGS; ++i) set_reg(i, std::vector<uint8_t>(sizeof(traits<tgf_b>::reg_t),0));
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reg.PC=address;
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reg.NEXT_PC=reg.PC;
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reg.trap_state=0;
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reg.machine_state=0x3;
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reg.icount=0;
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}
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uint8_t *tgf_b::get_regs_base_ptr() {
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return reinterpret_cast<uint8_t*>(®);
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}
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tgf_b::phys_addr_t tgf_b::virt2phys(const iss::addr_t &pc) {
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return phys_addr_t(pc); // change logical address to physical address
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}
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@ -59,8 +59,8 @@ std::tuple<cpu_ptr, vm_ptr> create_cpu(std::string const& backend, unsigned gdb_
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if(backend == "llvm")
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return {cpu_ptr{lcpu}, vm_ptr{iss::llvm::create(lcpu, gdb_port)}};
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#endif
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if(backend == "tcc")
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return {cpu_ptr{lcpu}, vm_ptr{iss::tcc::create(lcpu, gdb_port)}};
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// if(backend == "tcc")
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// return {cpu_ptr{lcpu}, vm_ptr{iss::tcc::create(lcpu, gdb_port)}};
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return {nullptr, nullptr};
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}
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@ -0,0 +1 @@
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/vm_tgf_b.cpp
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File diff suppressed because it is too large
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