DBT-RISE/DBT-RISE-TGC
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5d8da08ce5b7cf917037bf693719ef5ca6ec6a93
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Author SHA1 Message Date
eyck 5d8da08ce5 fix linker issue 
the root cuase of the issue is the template paramter deduction which led
to the wrong template parameter.
 2021-06-26 14:30:36 +02:00
eyck e432dd8208 fix handling of exceptions while accessing address spaces 2021-06-07 22:22:36 +02:00
eyck 8c385647dd remove redundant code from checked in generated sources 2021-05-26 23:06:31 +02:00
eyck aaceecd5dc fix mu_p platform features and CSRs 2021-05-17 09:20:09 +02:00
eyck 4b3f5a6b0c add missing change 2021-05-16 16:44:30 +02:00
eyck d41e1d816a add factory for ISS and use it in main.cpp 2021-05-16 16:44:14 +02:00
eyck a35974c9f5 make cpu type in core_complex configurable 2021-05-16 15:06:42 +02:00
eyck 9c456ba8f2 initial version of MU hart 2021-05-14 13:29:39 +02:00
eyck c57884caee small fix 2021-05-13 16:01:04 +02:00
eyck cf7b62a3f9 update names 2021-05-13 15:54:48 +02:00
eyck f2bf6d682a fix build setup 2021-05-13 14:03:10 +02:00
eyck a1fa8877f7 make core name a cmake option 2021-05-13 09:32:38 +02:00
eyck 391f9bb808 remove unneeded constants 2021-05-08 15:14:19 +02:00
eyck 0a76ccbdac make RSP register response independend of register definition 2021-03-31 07:48:46 +00:00
eyck 32e4aa83b8 use extracted variables 2021-03-27 09:36:52 +00:00
eyck 78c7064295 update groovy template to extract used registers 2021-03-26 08:24:45 +00:00
eyck 412a4bd9bb update name 2021-03-23 17:13:32 +00:00
eyck b0bcb7febb small fixes for robustness and readability 2021-03-22 22:47:30 +00:00
eyck 51fbc34fb3 change namespace of core complex 2021-03-22 11:57:40 +00:00
eyck 4e0f20eba0 rework abort conditions 2021-03-17 19:32:57 +00:00
eyck ff3fa19208 fix RVM description bugs 2021-03-13 10:46:41 +00:00
eyck 80057eef32 fix RVC description bugs, remove paged fetch 2021-03-13 10:46:41 +00:00
eyck f4ec21007b fix signedness issues 2021-03-11 16:12:28 +00:00
eyck ac8eab6e25 update RISC-V desciptions 2021-03-10 17:31:10 +00:00
eyck 768716b064 fix another missing XLEN 2021-03-09 11:07:56 +00:00
eyck bea0dcc387 update missing XLEN 2021-03-09 11:03:37 +00:00
eyck a6691bcd3c update generated code with correct sign extension 2021-03-09 10:21:36 +00:00
eyck 40db74ce02 remove tgf_b code generation 2021-03-07 16:26:14 +00:00
eyck c171e3c1ba update CoreDSL descriptions 2021-03-07 10:51:15 +00:00
eyck c251fe15d5 fix desscriptions to conform to ISA spec version 20191213 and TGF-C 2021-03-07 10:51:00 +00:00
eyck dae8acb8a3 checkpoint before refactor 2021-03-06 07:17:42 +00:00
eyck f7cec99fa6 adapt to changes in SCC 2021-03-01 21:08:18 +00:00
eyck be0e7db185 fix templates to comply with CoreDSL2 2021-03-01 21:07:20 +00:00
eyck 4aa26b85a0 adapt to change in SCC 2021-03-01 06:36:27 +00:00
eyck 9534d58d01 regenerated sources and and add opcode enum to headers 
Conflicts:
	gen_input/CoreDSL-Instruction-Set-Description
 2021-03-01 06:26:33 +00:00
eyck 1668df0531 regenerated sources and and add opcode enum to headers 2021-02-23 08:29:31 +00:00
eyck d8e009c72b update CoreDSL decriptions 2021-02-15 18:15:13 +00:00
eyck d07c8679ed update core definition 2021-02-15 18:14:52 +00:00
eyck 3d5b61f301 move boost libraries from tgfs_sc to tgfs library 2021-02-15 18:03:39 +00:00
eyck 337f1634c0 add mssing change 2021-02-15 18:01:46 +00:00
eyck 72b09472d5 update RISC-V descriptions 2021-02-15 18:01:33 +00:00
eyck 3261055871 update description to latest CoreDSL2 2021-02-15 11:35:56 +00:00
eyck 34bb8e62ae generate working ISS from CoreDSL 2.0 2021-02-06 14:47:06 +00:00
eyck da7e29fbb7 update definitions of derived constants 2021-01-01 09:19:48 +00:00
eyck c4da47cedd integrate code generation into build process (first attempt) 2020-12-30 07:29:52 +00:00
eyck ab554539e3 first version of tgf_c based on CoreDSL 2.0 2020-12-29 08:48:22 +00:00
eyck d43b35949e fix CMakeList.txt so that it builds without platform and external libs 2020-12-23 16:24:10 +00:00
eyck 18976e2ce4 adapt to newer gdb protocol 2020-06-22 08:45:12 +02:00
eyck 71b976811b add backend selection 2020-06-18 09:58:43 +02:00
eyck edeff7add8 update log macros 2020-06-18 07:38:56 +02:00
eyck e902936931 make interpreter default 2020-06-18 07:22:50 +02:00
eyck 55450f4900 [WIP] update dependencies in core desc 2020-06-18 06:18:59 +02:00
eyck c619194465 [WIP] rework generator 2020-06-05 07:25:40 +02:00
eyck abcfb75011 [WIP] 2020-05-31 16:41:04 +02:00
eyck 10797a473d modernize build system and cleanup dependencies 2020-05-30 14:16:10 +02:00
eyck 0ff6ccf9e2 get all compile clean 2020-05-30 11:27:44 +02:00
eyck 97a8ab1680 Merge branch 'feature/interpreter' into develop 2020-05-29 08:54:38 +02:00
eyck 0698b604fd add TCC backend 2020-05-29 08:52:55 +02:00
eyck 264053a8d6 [WIP] add next increment for TCC 2020-04-17 19:23:43 +02:00
eyck ae1c0b99fe [WIP] basic infrastructure working 2020-04-13 17:03:50 +02:00
eyck 8cdf50d69e [WIP] implement basic infrastructure 2020-04-12 12:44:30 +02:00
eyck 50663a2fbc [WIP] integrate tcc conan package 2020-04-10 17:14:04 +02:00
eyck 15f4c059e6 [WIP] first working version 2020-01-12 18:19:48 +01:00
eyck e483887c43 [WIP] Cleanup of namespaces etc to get compile clean 2020-01-10 11:12:20 +01:00
eyck fd2e40bfd2 Initial setup 2020-01-10 07:24:00 +01:00
eyck f357e563f2 Merge branch 'tmp' into develop 2020-01-09 19:44:52 +01:00
eyck 116ed9bb5c [WIP] started to add TinyCC backend 2020-01-09 19:43:17 +01:00
eyck c39460ee34 [WIP] started to add TinyCC backend 2020-01-09 19:37:17 +01:00
eyck 8b9775e06b Changed namespaces for LLVM related stuff 2020-01-07 16:38:31 +01:00
eyck 3c30c47c90 Updated description and added reference to VP 2019-12-10 04:45:04 +00:00
eyck d037141d98 Fixed C++11 compatibility 2019-07-16 15:52:34 +02:00
eyck 1947a2114f Fixed FMT header define 2019-07-14 16:51:14 +02:00
eyck 4ea6d73d86 Updated README to reflect latest cahnges 2019-06-29 13:00:58 +00:00
eyck e999d95623 Merge branch 'develop' 
Conflicts:
	dbt-core
	platform/src/sysc/plic.cpp
	sc-components
 2019-06-28 21:29:35 +02:00
eyck cc21afaaff Fixed CMakeLists.txt dependencies 2019-06-28 21:25:23 +02:00
eyck 7f06bba239 Fixed time csr handling 2019-06-28 20:58:02 +02:00
eyck d93c2feec4 Cleanup dependencies 2019-06-18 19:20:43 +00:00
eyck 2758933c16 Modernized CMake 2019-06-11 19:22:07 +00:00
eyck 67d9beb7bd reorganized layout to only contain risc-v stuff 2019-06-11 16:49:37 +00:00
eyck eb8365f4c3 Updated SC-Components 2019-04-11 05:40:02 +00:00
eyck cb3a0d8411 Merge branch 'develop' 2019-01-10 11:15:02 +00:00
eyck d5d236bf10 Adapted changes in SCC 2018-11-24 21:38:02 +01:00
eyck 769610d6fc Improved disassembly of running ISS 2018-11-24 20:29:24 +01:00
eyck df03e90181 Adapted to vm_base refactoring (move into llvm package) 2018-11-22 20:28:36 +01:00
eyck 58a446e6bc Refoctored to to move SystemC wrapper into riscv library 2018-11-19 20:39:11 +01:00
eyck a576fdf8e5 Cleanup of templates 2018-11-19 10:45:50 +01:00
eyck 976777a039 Updated submodules 2018-11-12 19:41:23 +01:00
eyck dd7b0f380a Cleanup 2018-11-12 19:38:16 +01:00
eyck d160a34c5d Refactored arch_if to save unneeded constructor calls 2018-11-12 19:36:45 +01:00
eyck 8092326437 Changed name to get consistent 2018-11-12 19:36:44 +01:00
eyck 20b3665003 Back-ported DVCon turorial changes 2018-11-12 19:36:44 +01:00
eyck 124a308ffa Fixed a type which rendered a link useless 2018-07-28 08:10:26 +00:00
eyck 62c4311c31 Updated repository references 2018-07-28 10:07:00 +02:00
eyck 0bf4933372 Added link to original repo 2018-07-28 10:02:28 +02:00
eyck 38099e3fc6 Added ADC, H-Bridge and motor models, refactored project structure 2018-07-28 09:45:49 +02:00
eyck 100822810f Added entire system incl. terminal and MCP3008 ADC connected via SPI 2018-07-23 22:46:30 +02:00
eyck a899d30556 Implemented basic HiFive1-like platform with PLL,tracing etc. 2018-07-13 20:04:07 +02:00
eyck b28595445c Extended README and clenaed up lauch configurations 2018-07-12 17:44:06 +02:00
eyck fede5b2af1 Changed SystemC model to model a platform in a system. Added dedicated 
UART Terminal connected via tlm_signals
 2018-07-12 15:27:36 +02:00
eyck a3baa45b00 Updated SystemC CCI to 1.0 2018-07-11 19:19:41 +02:00