 eyck
|
ec55efd322
|
adds generator changed files
|
2023-02-17 06:36:34 +01:00 |
|
|
eyck
|
8c3709f92a
|
adds generator changed files
|
2023-02-17 06:29:27 +01:00 |
|
|
eyck
|
207dbf1071
|
fixes out of range access for register alias names
|
2023-02-17 06:28:30 +01:00 |
|
|
eyck
|
62c118e501
|
fixes CSR to match latest fast interrupts spec
|
2023-01-20 16:21:04 +01:00 |
|
|
eyck
|
65dca13b42
|
fixes WFI miss of interrupt
|
2023-01-14 17:40:21 +01:00 |
|
|
eyck
|
3187cbdfe2
|
removes CONAN_PKG from build system
|
2022-12-12 02:55:44 +01:00 |
|
|
eyck
|
8c701d55c1
|
adapt to latest changes in SCC
|
2022-12-05 09:15:48 +01:00 |
|
|
eyck
|
f585489ff5
|
fixes pin naming
|
2022-10-26 17:21:44 +02:00 |
|
|
eyck
|
7113683ee0
|
moves pending interrupt check before handling trap thus saving 1 cycle
|
2022-10-15 10:47:35 +02:00 |
|
|
eyck
|
1a0fc4bd5d
|
fixes wrong mcounteren in M-mode only priv wrapper
|
2022-10-10 08:59:27 +02:00 |
|
|
eyck
|
40d1966e9a
|
fixes pending irq within irq hander behavior
|
2022-10-08 11:20:52 +02:00 |
|
|
eyck
|
a977200284
|
cleans up priv wrappers
|
2022-10-05 08:58:57 +02:00 |
|
|
eyck
|
b20fd3eba5
|
fix static build
|
2022-09-28 19:37:47 +02:00 |
|
|
eyck
|
b20daa1ac2
|
fixes wrong path in install
|
2022-09-27 09:11:41 +02:00 |
|
|
eyck
|
b1a18459e7
|
adds more flexible use of availabel targets
|
2022-09-26 13:57:24 +02:00 |
|
|
eyck
|
6ba7c82f80
|
fixes wrapper definitions for hwl cores
|
2022-09-26 13:31:46 +02:00 |
|
|
eyck
|
ad7bb28b4c
|
fixes write mask of clic memory mapped registers
|
2022-09-17 12:15:19 +02:00 |
|
|
eyck
|
fa7eda0889
|
fixes wrong check for exception
|
2022-08-31 11:45:53 +02:00 |
|
|
eyck
|
00e02bf565
|
adds support for different branch types in tracing
|
2022-08-08 06:30:37 +02:00 |
|
|
eyck
|
1ad66a71d8
|
extends supported break point types
|
2022-08-06 09:53:24 +02:00 |
|
|
eyck
|
e60fa3d5e6
|
adaptes to changes in dbt-rise-core
|
2022-08-06 09:49:32 +02:00 |
|
|
eyck
|
8407f6287f
|
replaces core_complex socket
|
2022-07-24 20:52:28 +02:00 |
|
|
eyck
|
0833198d34
|
aads missing windows compat firx to template
|
2022-07-23 14:36:23 +02:00 |
|
|
eyck
|
57347ae4d9
|
fixes cppcheck flagged issues
|
2022-07-23 13:49:10 +02:00 |
|
|
eyck
|
4876f18ba9
|
adds windows compatibility fixes
|
2022-07-18 11:43:42 +02:00 |
|
|
eyck
|
a53ee42e13
|
updates TGC_C according to CoreDSL description update
|
2022-07-12 22:34:22 +02:00 |
|
|
eyck
|
12ccfc055a
|
updates generate tgc_c definition
|
2022-07-11 22:58:10 +02:00 |
|
|
eyck
|
feaa49d367
|
removes decoder again as there is some issue
|
2022-06-20 00:39:11 +02:00 |
|
|
eyck
|
18f33b4a68
|
fixes ordering of instructions for decoding
|
2022-06-19 16:52:29 +02:00 |
|
|
eyck
|
f096b15dbd
|
factors decoder into separate component
|
2022-06-19 13:17:31 +02:00 |
|
|
eyck
|
cb5375258a
|
removes compilatioon of unneeded files
|
2022-06-10 07:19:46 +02:00 |
|
|
eyck
|
076b5a39ad
|
fix class naming
|
2022-06-02 08:30:49 +02:00 |
|
|
eyck
|
f40ab41899
|
fix left-over from layout refactoring
|
2022-06-02 08:30:02 +02:00 |
|
|
eyck
|
e8fd5143bc
|
fix build options for standalone ISS
|
2022-05-31 11:05:26 +02:00 |
|
|
eyck
|
31fb51de95
|
update tgc_c generated code
|
2022-05-30 22:15:44 +02:00 |
|
|
eyck
|
5d481eb79d
|
fix generation of non-exception code
|
2022-05-30 22:04:16 +02:00 |
|
|
eyck
|
1c90fe765d
|
Merge remote-tracking branch 'origin/Trace_enhancement' into develop
|
2022-05-30 14:18:09 +02:00 |
|
|
eyck
|
52ed8b81a6
|
fixed template to work with previous code generator
|
2022-05-30 14:08:02 +02:00 |
|
|
eyck
|
0703a0a845
|
update tgc-mapper
|
2022-05-30 07:45:32 +02:00 |
|
|
eyck
|
0c542d42aa
|
separate generated sources
|
2022-05-21 12:48:28 +02:00 |
|
|
eyck
|
966d1616c5
|
change source code to unified layout
|
2022-05-21 11:55:24 +02:00 |
|
|
eyck
|
df16378605
|
update template for changed code generator
|
2022-05-18 19:10:34 +02:00 |
|
|
eyck
|
1438f0f373
|
add backannotation to pc trace plugin
|
2022-05-17 15:29:04 +02:00 |
|
|
eyck
|
766f3ba9ee
|
fix assertion in compressed pctrace writer
|
2022-05-13 12:38:12 +02:00 |
|
|
eyck
|
5da4e6b424
|
fix alignment check for unaligned debugger accesses
|
2022-05-13 12:37:47 +02:00 |
|
|
eyck
|
e382217e04
|
update vm_tgc_c due reworked CoreDSL generator
|
2022-05-11 18:52:15 +02:00 |
|
|
eyck
|
9db4e3fd87
|
fix assertion
|
2022-05-10 16:13:21 +02:00 |
|
|
eyck
|
e56bc12788
|
fix non-lz4 build of plugin
|
2022-05-07 17:27:11 +02:00 |
|
|
eyck
|
e88f309ea2
|
add lz4 compression to pctrace
|
2022-05-07 17:22:06 +02:00 |
|
|
eyck
|
03bec27376
|
implement extended instrumentation interface
|
2022-04-26 17:14:33 +02:00 |
|
|
eyck
|
9d9008a3a2
|
fix pointer mess
|
2022-04-26 15:35:17 +02:00 |
|
|
eyck
|
a92b84bef4
|
add code word access for ISS plugins
|
2022-04-25 14:18:19 +02:00 |
|
|
eyck
|
477c530847
|
extend debug mode handling
|
2022-04-13 11:41:01 +02:00 |
|
|
eyck
|
c054d75717
|
update to latest coredsl description
|
2022-04-10 18:55:44 +02:00 |
|
|
eyck
|
15cd26f800
|
remove CoreDSL ISA repo
|
2022-04-10 12:15:40 +02:00 |
|
|
eyck
|
9465cffe79
|
adapt to change in dbt-rise-core
|
2022-04-09 14:55:36 +02:00 |
|
|
eyck
|
00d2d06cbd
|
adapt to privileged spec
|
2022-03-31 20:33:12 +02:00 |
|
|
eyck
|
8e4e702cb9
|
Merge remote-tracking branch 'origin/feature/reduced_output' into develop
|
2022-03-28 14:09:06 +02:00 |
|
|
eyck
|
49be143588
|
make features configurable
|
2022-03-27 17:54:08 +02:00 |
|
|
eyck
|
0aea1d0177
|
remove mcounteren in M-mode only wrapper
|
2022-03-27 17:21:46 +02:00 |
|
|
eyck
|
6ea7721961
|
add TCM
|
2022-03-27 15:38:18 +02:00 |
|
|
eyck
|
b0cb997009
|
add TGC_X with DMR
|
2022-03-26 10:48:21 +01:00 |
|
|
eyck
|
9dfca612b7
|
add hardware loop CSR access
|
2022-03-25 11:33:44 +01:00 |
|
|
eyck
|
30ae743361
|
add pctrace plugin to iss
|
2022-03-20 17:41:54 +01:00 |
|
|
eyck
|
d91f5f9df4
|
fix compiler warning for reduced number of registers
|
2022-03-14 15:38:05 +01:00 |
|
|
eyck
|
2e670c4d03
|
change interpreter structure
|
2022-03-06 15:11:38 +01:00 |
|
|
eyck
|
3d32c33333
|
update gitignore
|
2022-03-05 20:59:45 +01:00 |
|
|
eyck
|
521f40a3d6
|
refactored interpreter backend structure
|
2022-03-05 20:59:17 +01:00 |
|
|
eyck
|
b37ef973de
|
clean up
|
2022-02-14 20:36:12 +01:00 |
|
|
eyck
|
b8fa5fbbda
|
adapt to extended instrumentation interface
|
2022-02-09 21:01:17 +01:00 |
|
|
eyck
|
ac86f14a54
|
add tgc_c_xrb_nn to tgc-sim
|
2022-02-02 21:33:42 +01:00 |
|
|
eyck
|
68b5697c8f
|
Fix cycles JSON template
|
2022-02-01 21:48:56 +01:00 |
|
|
eyck
|
09b0f0d0c8
|
fix cycle estimation plugin
|
2022-02-01 21:14:50 +01:00 |
|
|
eyck
|
98b418ff43
|
fix JSON reading
|
2022-02-01 19:28:11 +01:00 |
|
|
eyck
|
059bd0d371
|
rework cycle estimation
|
2022-02-01 19:03:45 +01:00 |
|
|
eyck
|
ef2a4df925
|
simplify spawn block handling
|
2022-01-31 23:40:31 +01:00 |
|
|
eyck
|
afe8905ac9
|
fix else-ambiguity in CoreDSL description
|
2022-01-31 20:30:46 +01:00 |
|
|
eyck
|
3563ba80d0
|
add spawn blocks
|
2022-01-12 07:21:16 +01:00 |
|
|
eyck
|
09955be90f
|
update gitignore
|
2021-12-05 08:45:49 +01:00 |
|
|
eyck
|
dd4c19a15c
|
add option to configure number of irq
|
2021-12-01 12:56:36 +01:00 |
|
|
eyck
|
07d5af1dde
|
fix stand-alone ISS compilation to include all generated cores
|
2021-11-26 17:56:40 +01:00 |
|
|
eyck
|
6f8595759e
|
make tgc-sim include all available ISS
|
2021-11-25 20:00:27 +01:00 |
|
|
eyck
|
309758b994
|
fix clic_cfg access scheme
|
2021-11-17 07:59:02 +01:00 |
|
|
eyck
|
965929d1eb
|
remove descriptions
|
2021-11-15 09:30:16 +01:00 |
|
|
eyck
|
d47375a70e
|
fix ebreak CSR update
|
2021-11-13 12:47:23 +01:00 |
|
|
eyck
|
d31b4ef5a8
|
fix MISA val
|
2021-11-11 12:58:57 +01:00 |
|
|
eyck
|
7452c5df43
|
add TGC_D_XRB_NN definition
|
2021-11-11 12:16:35 +01:00 |
|
|
eyck
|
43d7b99905
|
revert pmp check implementation
|
2021-11-11 09:58:19 +01:00 |
|
|
eyck
|
f90c48e881
|
adapt to changed define names
|
2021-11-11 08:33:35 +01:00 |
|
|
eyck
|
2d7973520b
|
fix mip handling
|
2021-11-09 19:47:34 +01:00 |
|
|
eyck
|
fd98ad95f6
|
rework PMP check and fix MISA for TGC_D
|
2021-11-09 15:55:22 +01:00 |
|
|
eyck
|
bfa8166223
|
fix wrong template class name
|
2021-11-08 10:44:33 +01:00 |
|
|
eyck
|
c42e336509
|
fix proper debug mode handling (#267 & #268)
|
2021-11-07 17:48:44 +01:00 |
|
|
eyck
|
49d09a05d7
|
fix access rights to debug CSR register (#268)
|
2021-11-07 16:45:10 +01:00 |
|
|
eyck
|
459794b863
|
add proper handling of store access fault (hart_mu_p)
|
2021-11-06 13:29:11 +01:00 |
|
|
eyck
|
039746112b
|
fix exception behavior
|
2021-11-02 15:10:20 +01:00 |
|
|
eyck
|
ac6d7ea5d4
|
add debug feature to platform
|
2021-11-02 11:13:29 +01:00 |
|
|
eyck
|
8b6e3abd23
|
fix hard-code arch in templates
|
2021-10-30 13:37:17 +02:00 |
|
|
eyck
|
1616f0ac90
|
remove deprecated functions
|
2021-10-30 12:57:08 +02:00 |
|
|
eyck
|
a20f39e847
|
update core definitions to include Zicsr and Zifencei (#276)
|
2021-10-30 12:56:31 +02:00 |
|