add spawn blocks
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09955be90f
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@ -7,6 +7,7 @@ project(dbt-rise-tgc VERSION 1.0.0)
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include(GNUInstallDirs)
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find_package(elfio)
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find_package(Boost COMPONENTS coroutine)
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if(WITH_LLVM)
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if(DEFINED ENV{LLVM_HOME})
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@ -66,7 +67,7 @@ elseif("${CMAKE_CXX_COMPILER_ID}" STREQUAL "MSVC")
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target_compile_options(${PROJECT_NAME} PRIVATE /wd4293)
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endif()
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target_include_directories(${PROJECT_NAME} PUBLIC incl)
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target_link_libraries(${PROJECT_NAME} PUBLIC softfloat scc-util jsoncpp)
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target_link_libraries(${PROJECT_NAME} PUBLIC softfloat scc-util jsoncpp Boost::coroutine)
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if("${CMAKE_CXX_COMPILER_ID}" STREQUAL "GNU")
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target_link_libraries(${PROJECT_NAME} PUBLIC -Wl,--whole-archive dbt-core -Wl,--no-whole-archive)
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else()
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@ -161,7 +161,7 @@ struct ${coreDef.name.toLowerCase()}: public arch_if {
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inline uint32_t get_last_branch() { return reg.last_branch; }
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protected:
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#pragma pack(push, 1)
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struct ${coreDef.name}_regs {<%
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registers.each { reg -> if(reg.size>0) {%>
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@ -45,6 +45,8 @@ def nativeTypeSize(int size){
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#include <iss/interp/vm_base.h>
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#include <util/logging.h>
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#include <sstream>
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#include <boost/coroutine2/all.hpp>
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#include <functional>
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#ifndef FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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@ -59,6 +61,7 @@ namespace interp {
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namespace ${coreDef.name.toLowerCase()} {
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using namespace iss::arch;
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using namespace iss::debugger;
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using namespace std::placeholders;
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template <typename ARCH> class vm_impl : public iss::interp::vm_base<ARCH> {
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public:
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@ -130,6 +133,10 @@ protected:
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this->core.wait_until(type);
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}
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using yield_t = boost::coroutines2::coroutine<void>::push_type;
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using coro_t = boost::coroutines2::coroutine<void>::pull_type;
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std::vector<coro_t> spawn_blocks;
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template<typename T>
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T& pc_assign(T& val){super::ex_info.branch_taken=true; return val;}
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inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){
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@ -174,7 +181,9 @@ protected:
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auto sign_mask = 1ULL<<(W-1);
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return (from & mask) | ((from & sign_mask) ? ~mask : 0);
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}
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<%functions.each{ it.eachLine { %>
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${it}<%}%>
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<%}%>
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private:
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/****************************************************************************
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* start opcode definitions
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@ -196,11 +205,6 @@ private:
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/* instruction ${idx}: ${instr.name} */
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compile_ret_t __${generator.functionName(instr.name)}(virt_addr_t& pc, code_word_t instr){
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// pre execution stuff
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auto* PC = reinterpret_cast<uint${addrDataWidth}_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
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auto NEXT_PC = reinterpret_cast<uint${addrDataWidth}_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
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*PC=*NEXT_PC;
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auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
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*trap_state = *reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PENDING_TRAP]);
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if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, ${idx});
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<%instr.fields.eachLine{%>${it}
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<%}%>if(this->disass_enabled){
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@ -208,6 +212,9 @@ private:
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<%instr.disass.eachLine{%>${it}
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<%}%>
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}
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auto* PC = reinterpret_cast<uint${addrDataWidth}_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
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auto* NEXT_PC = reinterpret_cast<uint${addrDataWidth}_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
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auto* trap_state = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::TRAP_STATE]);
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// used registers<%instr.usedVariables.each{ k,v->
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if(v.isArray) {%>
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auto* ${k} = reinterpret_cast<uint${nativeTypeSize(v.type.size)}_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::${k}0]);<% }else{ %>
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@ -219,6 +226,7 @@ private:
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<%instr.behavior.eachLine{%>${it}
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<%}%>} catch(...){}
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// post execution stuff
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for(auto& spawn_block:spawn_blocks) spawn_block();
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if(this->sync_exec && POST_SYNC) this->do_sync(POST_SYNC, ${idx});
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// trap check
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if(*trap_state!=0){
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@ -335,6 +343,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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auto f = decode_inst(insn);
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auto old_pc = pc.val;
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pc = (this->*f)(pc, insn);
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this->core.reg.PC = this->core.reg.NEXT_PC;
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this->core.reg.trap_state = this->core.reg.pending_trap;
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}
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}
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return pc;
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