fix else-ambiguity in CoreDSL description
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Submodule gen_input/CoreDSL-Instruction-Set-Description deleted from b005607fc3
@ -217,7 +217,7 @@ struct tgc_c: public arch_if {
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inline uint32_t get_last_branch() { return reg.last_branch; }
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protected:
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#pragma pack(push, 1)
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struct TGC_C_regs {
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uint32_t X0 = 0;
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