factors decoder into separate component
This commit is contained in:
parent
cb5375258a
commit
f096b15dbd
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@ -36,7 +36,8 @@ FILE(GLOB GEN_SOURCES
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set(LIB_SOURCES
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src/iss/plugin/instruction_count.cpp
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src/iss/arch/tgc_c.cpp
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src/iss/arch/tgc_c.cpp
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src/iss/arch/tgc_c_decoder.cpp
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src/vm/interp/vm_tgc_c.cpp
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src/vm/fp_functions.cpp
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${GEN_SOURCES}
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@ -69,6 +69,7 @@ def getCString(def val){
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#include <array>
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#include <iss/arch/traits.h>
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#include <iss/arch_if.h>
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#include <iss/arch/instruction_decoder.h>
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#include <iss/vm_if.h>
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namespace iss {
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@ -120,6 +121,8 @@ template <> struct traits<${coreDef.name.toLowerCase()}> {
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${instr.instruction.name} = ${index},<%}%>
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MAX_OPCODE
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};
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static std::unique_ptr<instruction_decoder<${coreDef.name.toLowerCase()}>> get_decoder();
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};
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struct ${coreDef.name.toLowerCase()}: public arch_if {
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@ -0,0 +1,86 @@
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#include "${coreDef.name.toLowerCase()}.h"
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#include <vector>
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#include <array>
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#include <cstdlib>
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#include <algorithm>
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namespace iss {
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namespace arch {
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namespace {
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// according to
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// https://stackoverflow.com/questions/8871204/count-number-of-1s-in-binary-representation
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#ifdef __GCC__
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constexpr size_t bit_count(uint32_t u) { return __builtin_popcount(u); }
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#elif __cplusplus < 201402L
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constexpr size_t uCount(uint32_t u) { return u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111); }
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constexpr size_t bit_count(uint32_t u) { return ((uCount(u) + (uCount(u) >> 3)) & 030707070707) % 63; }
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#else
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constexpr size_t bit_count(uint32_t u) {
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size_t uCount = u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111);
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return ((uCount + (uCount >> 3)) & 030707070707) % 63;
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}
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#endif
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using opcode_e = traits<${coreDef.name.toLowerCase()}>::opcode_e;
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/****************************************************************************
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* start opcode definitions
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****************************************************************************/
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struct instruction_desriptor {
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size_t length;
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uint32_t value;
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uint32_t mask;
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opcode_e op;
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};
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const std::array<instruction_desriptor, ${instructions.size}> instr_descr = {{
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/* entries are: size, valid value, valid mask, function ptr */<%instructions.each{instr -> %>
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{${instr.length}, ${instr.encoding}, ${instr.mask}, opcode_e::${instr.instruction.name}},<%}%>
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}};
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}
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template<>
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struct instruction_decoder<${coreDef.name.toLowerCase()}> {
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using opcode_e = traits<${coreDef.name.toLowerCase()}>::opcode_e;
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using code_word_t=traits<${coreDef.name.toLowerCase()}>::code_word_t;
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struct instruction_pattern {
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uint32_t value;
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uint32_t mask;
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opcode_e id;
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};
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std::array<std::vector<instruction_pattern>, 4> qlut;
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template<typename T>
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unsigned decode_instruction(T);
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instruction_decoder() {
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for (auto instr : instr_descr) {
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auto quadrant = instr.value & 0x3;
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qlut[quadrant].push_back(instruction_pattern{instr.value, instr.mask, instr.op});
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}
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for(auto& lut: qlut){
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std::sort(std::begin(lut), std::end(lut), [](instruction_pattern const& a, instruction_pattern const& b){
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return bit_count(a.mask) > bit_count(b.mask);
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});
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}
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}
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};
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template<>
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unsigned instruction_decoder<${coreDef.name.toLowerCase()}>::decode_instruction<traits<${coreDef.name.toLowerCase()}>::code_word_t>(traits<${coreDef.name.toLowerCase()}>::code_word_t instr){
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auto res = std::find_if(std::begin(qlut[instr&0x3]), std::end(qlut[instr&0x3]), [instr](instruction_pattern const& e){
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return !((instr&e.mask) ^ e.value );
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});
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return static_cast<unsigned>(res!=std::end(qlut[instr&0x3])? res->id : opcode_e::MAX_OPCODE);
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}
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std::unique_ptr<instruction_decoder<${coreDef.name.toLowerCase()}>> traits<${coreDef.name.toLowerCase()}>::get_decoder(){
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return std::make_unique<instruction_decoder<${coreDef.name.toLowerCase()}>>();
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}
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}
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}
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@ -12,5 +12,6 @@
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${name}: <% instrList.findAll{!it.instruction.name.startsWith("__")}.each { %>
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- ${it.instruction.name}:
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encoding: ${it.encoding}
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mask: ${it.mask}<%}}%>
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mask: ${it.mask}<%if(it.attributes.size) {%>
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attributes: ${it.attributes}<%}}}%>
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@ -73,6 +73,7 @@ public:
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using addr_t = typename super::addr_t;
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using reg_t = typename traits::reg_t;
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using mem_type_e = typename traits::mem_type_e;
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using opcode_e = typename traits::opcode_e;
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vm_impl();
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@ -94,7 +95,6 @@ protected:
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inline const char *name(size_t index){return traits::reg_aliases.at(index);}
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typename arch::traits<ARCH>::opcode_e decode_inst_id(code_word_t instr);
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virt_addr_t execute_inst(finish_cond_e cond, virt_addr_t start, uint64_t icount_limit) override;
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// some compile time constants
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@ -111,13 +111,7 @@ protected:
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std::array<compile_func, LUT_SIZE_C> lut_00, lut_01, lut_10;
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std::array<compile_func, LUT_SIZE> lut_11;
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struct instruction_pattern {
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uint32_t value;
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uint32_t mask;
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typename arch::traits<ARCH>::opcode_e id;
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};
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std::array<std::vector<instruction_pattern>, 4> qlut;
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std::unique_ptr<instruction_decoder<ARCH>> decoder;
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inline void raise(uint16_t trap_id, uint16_t cause){
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auto trap_val = 0x80ULL << 24 | (cause << 16) | trap_id;
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@ -139,42 +133,7 @@ protected:
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template<typename T>
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T& pc_assign(T& val){super::ex_info.branch_taken=true; return val;}
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inline uint8_t readSpace1(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint8_t>(space, addr);
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if(this->core.trap_state) throw 0;
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return ret;
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}
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inline uint16_t readSpace2(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint16_t>(space, addr);
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if(this->core.trap_state) throw 0;
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return ret;
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}
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inline uint32_t readSpace4(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint32_t>(space, addr);
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if(this->core.trap_state) throw 0;
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return ret;
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}
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inline uint64_t readSpace8(typename super::mem_type_e space, uint64_t addr){
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auto ret = super::template read_mem<uint64_t>(space, addr);
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if(this->core.trap_state) throw 0;
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return ret;
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}
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inline void writeSpace1(typename super::mem_type_e space, uint64_t addr, uint8_t data){
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super::write_mem(space, addr, data);
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if(this->core.trap_state) throw 0;
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}
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inline void writeSpace2(typename super::mem_type_e space, uint64_t addr, uint16_t data){
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super::write_mem(space, addr, data);
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if(this->core.trap_state) throw 0;
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}
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inline void writeSpace4(typename super::mem_type_e space, uint64_t addr, uint32_t data){
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super::write_mem(space, addr, data);
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if(this->core.trap_state) throw 0;
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}
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inline void writeSpace8(typename super::mem_type_e space, uint64_t addr, uint64_t data){
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super::write_mem(space, addr, data);
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if(this->core.trap_state) throw 0;
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}
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template<unsigned W, typename U, typename S = typename std::make_signed<U>::type>
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inline S sext(U from) {
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auto mask = (1ULL<<W) - 1;
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@ -194,20 +153,6 @@ protected:
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${it}<%}%>
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<%}%>
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private:
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/****************************************************************************
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* start opcode definitions
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****************************************************************************/
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struct InstructionDesriptor {
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size_t length;
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uint32_t value;
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uint32_t mask;
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typename arch::traits<ARCH>::opcode_e op;
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};
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const std::array<InstructionDesriptor, ${instructions.size}> instr_descr = {{
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/* entries are: size, valid value, valid mask, function ptr */<%instructions.each{instr -> %>
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{${instr.length}, ${instr.encoding}, ${instr.mask}, arch::traits<ARCH>::opcode_e::${instr.instruction.name}},<%}%>
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}};
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//static constexpr typename traits::addr_t upper_bits = ~traits::PGMASK;
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iss::status fetch_ins(virt_addr_t pc, uint8_t * data){
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@ -247,16 +192,7 @@ constexpr size_t bit_count(uint32_t u) {
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template <typename ARCH>
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vm_impl<ARCH>::vm_impl(ARCH &core, unsigned core_id, unsigned cluster_id)
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: vm_base<ARCH>(core, core_id, cluster_id) {
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unsigned id=0;
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for (auto instr : instr_descr) {
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auto quadrant = instr.value & 0x3;
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qlut[quadrant].push_back(instruction_pattern{instr.value, instr.mask, instr.op});
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}
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for(auto& lut: qlut){
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std::sort(std::begin(lut), std::end(lut), [](instruction_pattern const& a, instruction_pattern const& b){
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return bit_count(a.mask) > bit_count(b.mask);
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});
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}
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decoder = traits::get_decoder();
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}
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inline bool is_count_limit_enabled(finish_cond_e cond){
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@ -267,19 +203,11 @@ inline bool is_jump_to_self_enabled(finish_cond_e cond){
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return (cond & finish_cond_e::JUMP_TO_SELF) == finish_cond_e::JUMP_TO_SELF;
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}
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template <typename ARCH>
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typename arch::traits<ARCH>::opcode_e vm_impl<ARCH>::decode_inst_id(code_word_t instr){
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for(auto& e: qlut[instr&0x3]){
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if(!((instr&e.mask) ^ e.value )) return e.id;
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}
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return arch::traits<ARCH>::opcode_e::MAX_OPCODE;
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}
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template <typename ARCH>
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typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e cond, virt_addr_t start, uint64_t icount_limit){
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auto pc=start;
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auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::PC]);
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auto* NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::NEXT_PC]);
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auto* PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+traits::reg_byte_offsets[traits::PC]);
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auto* NEXT_PC = reinterpret_cast<uint32_t*>(this->regs_base_ptr+traits::reg_byte_offsets[traits::NEXT_PC]);
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auto& trap_state = this->core.trap_state;
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auto& icount = this->core.icount;
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auto& cycle = this->core.cycle;
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@ -296,11 +224,11 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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} else {
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if (is_jump_to_self_enabled(cond) &&
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(instr == 0x0000006f || (instr&0xffff)==0xa001)) throw simulation_stopped(0); // 'J 0' or 'C.J 0'
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auto inst_id = decode_inst_id(instr);
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auto inst_id = static_cast<opcode_e>(decoder->decode_instruction(instr));
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// pre execution stuff
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if(this->sync_exec && PRE_SYNC) this->do_sync(PRE_SYNC, static_cast<unsigned>(inst_id));
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switch(inst_id){<%instructions.eachWithIndex{instr, idx -> %>
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case arch::traits<ARCH>::opcode_e::${instr.name}: {
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case opcode_e::${instr.name}: {
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<%instr.fields.eachLine{%>${it}
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<%}%>if(this->disass_enabled){
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/* generate console output when executing the command */<%instr.disass.eachLine{%>
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@ -308,8 +236,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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}
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// used registers<%instr.usedVariables.each{ k,v->
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if(v.isArray) {%>
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auto* ${k} = reinterpret_cast<uint${nativeTypeSize(v.type.size)}_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::${k}0]);<% }else{ %>
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auto* ${k} = reinterpret_cast<uint${nativeTypeSize(v.type.size)}_t*>(this->regs_base_ptr+arch::traits<ARCH>::reg_byte_offsets[arch::traits<ARCH>::${k}]);
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auto* ${k} = reinterpret_cast<uint${nativeTypeSize(v.type.size)}_t*>(this->regs_base_ptr+traits::reg_byte_offsets[traits::${k}0]);<% }else{ %>
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auto* ${k} = reinterpret_cast<uint${nativeTypeSize(v.type.size)}_t*>(this->regs_base_ptr+traits::reg_byte_offsets[traits::${k}]);
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<%}}%>// calculate next pc value
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*NEXT_PC = *PC + ${instr.length/8};
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// execute instruction<%instr.behavior.eachLine{%>
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@ -36,6 +36,7 @@
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#include <array>
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#include <iss/arch/traits.h>
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#include <iss/arch_if.h>
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#include <iss/arch/instruction_decoder.h>
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#include <iss/vm_if.h>
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namespace iss {
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@ -176,6 +177,8 @@ template <> struct traits<tgc_c> {
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DII = 89,
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MAX_OPCODE
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};
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static std::unique_ptr<instruction_decoder<tgc_c>> get_decoder();
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};
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struct tgc_c: public arch_if {
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@ -0,0 +1,175 @@
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#include "tgc_c.h"
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#include <vector>
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#include <array>
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#include <cstdlib>
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#include <algorithm>
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namespace iss {
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namespace arch {
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namespace {
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// according to
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// https://stackoverflow.com/questions/8871204/count-number-of-1s-in-binary-representation
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#ifdef __GCC__
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constexpr size_t bit_count(uint32_t u) { return __builtin_popcount(u); }
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#elif __cplusplus < 201402L
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constexpr size_t uCount(uint32_t u) { return u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111); }
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constexpr size_t bit_count(uint32_t u) { return ((uCount(u) + (uCount(u) >> 3)) & 030707070707) % 63; }
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#else
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constexpr size_t bit_count(uint32_t u) {
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size_t uCount = u - ((u >> 1) & 033333333333) - ((u >> 2) & 011111111111);
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return ((uCount + (uCount >> 3)) & 030707070707) % 63;
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}
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#endif
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using opcode_e = traits<tgc_c>::opcode_e;
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/****************************************************************************
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* start opcode definitions
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****************************************************************************/
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struct instruction_desriptor {
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size_t length;
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uint32_t value;
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uint32_t mask;
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opcode_e op;
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};
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const std::array<instruction_desriptor, 90> instr_descr = {{
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/* entries are: size, valid value, valid mask, function ptr */
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{32, 0b00000000000000000000000000110111, 0b00000000000000000000000001111111, opcode_e::LUI},
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{32, 0b00000000000000000000000000010111, 0b00000000000000000000000001111111, opcode_e::AUIPC},
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{32, 0b00000000000000000000000001101111, 0b00000000000000000000000001111111, opcode_e::JAL},
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{32, 0b00000000000000000000000001100111, 0b00000000000000000111000001111111, opcode_e::JALR},
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{32, 0b00000000000000000000000001100011, 0b00000000000000000111000001111111, opcode_e::BEQ},
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{32, 0b00000000000000000001000001100011, 0b00000000000000000111000001111111, opcode_e::BNE},
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{32, 0b00000000000000000100000001100011, 0b00000000000000000111000001111111, opcode_e::BLT},
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{32, 0b00000000000000000101000001100011, 0b00000000000000000111000001111111, opcode_e::BGE},
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{32, 0b00000000000000000110000001100011, 0b00000000000000000111000001111111, opcode_e::BLTU},
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{32, 0b00000000000000000111000001100011, 0b00000000000000000111000001111111, opcode_e::BGEU},
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{32, 0b00000000000000000000000000000011, 0b00000000000000000111000001111111, opcode_e::LB},
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{32, 0b00000000000000000001000000000011, 0b00000000000000000111000001111111, opcode_e::LH},
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{32, 0b00000000000000000010000000000011, 0b00000000000000000111000001111111, opcode_e::LW},
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{32, 0b00000000000000000100000000000011, 0b00000000000000000111000001111111, opcode_e::LBU},
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{32, 0b00000000000000000101000000000011, 0b00000000000000000111000001111111, opcode_e::LHU},
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{32, 0b00000000000000000000000000100011, 0b00000000000000000111000001111111, opcode_e::SB},
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{32, 0b00000000000000000001000000100011, 0b00000000000000000111000001111111, opcode_e::SH},
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{32, 0b00000000000000000010000000100011, 0b00000000000000000111000001111111, opcode_e::SW},
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{32, 0b00000000000000000000000000010011, 0b00000000000000000111000001111111, opcode_e::ADDI},
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{32, 0b00000000000000000010000000010011, 0b00000000000000000111000001111111, opcode_e::SLTI},
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{32, 0b00000000000000000011000000010011, 0b00000000000000000111000001111111, opcode_e::SLTIU},
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{32, 0b00000000000000000100000000010011, 0b00000000000000000111000001111111, opcode_e::XORI},
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{32, 0b00000000000000000110000000010011, 0b00000000000000000111000001111111, opcode_e::ORI},
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{32, 0b00000000000000000111000000010011, 0b00000000000000000111000001111111, opcode_e::ANDI},
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{32, 0b00000000000000000001000000010011, 0b11111110000000000111000001111111, opcode_e::SLLI},
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{32, 0b00000000000000000101000000010011, 0b11111110000000000111000001111111, opcode_e::SRLI},
|
||||
{32, 0b01000000000000000101000000010011, 0b11111110000000000111000001111111, opcode_e::SRAI},
|
||||
{32, 0b00000000000000000000000000110011, 0b11111110000000000111000001111111, opcode_e::ADD},
|
||||
{32, 0b01000000000000000000000000110011, 0b11111110000000000111000001111111, opcode_e::SUB},
|
||||
{32, 0b00000000000000000001000000110011, 0b11111110000000000111000001111111, opcode_e::SLL},
|
||||
{32, 0b00000000000000000010000000110011, 0b11111110000000000111000001111111, opcode_e::SLT},
|
||||
{32, 0b00000000000000000011000000110011, 0b11111110000000000111000001111111, opcode_e::SLTU},
|
||||
{32, 0b00000000000000000100000000110011, 0b11111110000000000111000001111111, opcode_e::XOR},
|
||||
{32, 0b00000000000000000101000000110011, 0b11111110000000000111000001111111, opcode_e::SRL},
|
||||
{32, 0b01000000000000000101000000110011, 0b11111110000000000111000001111111, opcode_e::SRA},
|
||||
{32, 0b00000000000000000110000000110011, 0b11111110000000000111000001111111, opcode_e::OR},
|
||||
{32, 0b00000000000000000111000000110011, 0b11111110000000000111000001111111, opcode_e::AND},
|
||||
{32, 0b00000000000000000000000000001111, 0b00000000000000000111000001111111, opcode_e::FENCE},
|
||||
{32, 0b00000000000000000000000001110011, 0b11111111111111111111111111111111, opcode_e::ECALL},
|
||||
{32, 0b00000000000100000000000001110011, 0b11111111111111111111111111111111, opcode_e::EBREAK},
|
||||
{32, 0b00000000001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::URET},
|
||||
{32, 0b00010000001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::SRET},
|
||||
{32, 0b00110000001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::MRET},
|
||||
{32, 0b00010000010100000000000001110011, 0b11111111111111111111111111111111, opcode_e::WFI},
|
||||
{32, 0b01111011001000000000000001110011, 0b11111111111111111111111111111111, opcode_e::DRET},
|
||||
{32, 0b00000000000000000001000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRW},
|
||||
{32, 0b00000000000000000010000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRS},
|
||||
{32, 0b00000000000000000011000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRC},
|
||||
{32, 0b00000000000000000101000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRWI},
|
||||
{32, 0b00000000000000000110000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRSI},
|
||||
{32, 0b00000000000000000111000001110011, 0b00000000000000000111000001111111, opcode_e::CSRRCI},
|
||||
{32, 0b00000000000000000001000000001111, 0b00000000000000000111000001111111, opcode_e::FENCE_I},
|
||||
{32, 0b00000010000000000000000000110011, 0b11111110000000000111000001111111, opcode_e::MUL},
|
||||
{32, 0b00000010000000000001000000110011, 0b11111110000000000111000001111111, opcode_e::MULH},
|
||||
{32, 0b00000010000000000010000000110011, 0b11111110000000000111000001111111, opcode_e::MULHSU},
|
||||
{32, 0b00000010000000000011000000110011, 0b11111110000000000111000001111111, opcode_e::MULHU},
|
||||
{32, 0b00000010000000000100000000110011, 0b11111110000000000111000001111111, opcode_e::DIV},
|
||||
{32, 0b00000010000000000101000000110011, 0b11111110000000000111000001111111, opcode_e::DIVU},
|
||||
{32, 0b00000010000000000110000000110011, 0b11111110000000000111000001111111, opcode_e::REM},
|
||||
{32, 0b00000010000000000111000000110011, 0b11111110000000000111000001111111, opcode_e::REMU},
|
||||
{16, 0b0000000000000000, 0b1110000000000011, opcode_e::CADDI4SPN},
|
||||
{16, 0b0100000000000000, 0b1110000000000011, opcode_e::CLW},
|
||||
{16, 0b1100000000000000, 0b1110000000000011, opcode_e::CSW},
|
||||
{16, 0b0000000000000001, 0b1110000000000011, opcode_e::CADDI},
|
||||
{16, 0b0000000000000001, 0b1110111110000011, opcode_e::CNOP},
|
||||
{16, 0b0010000000000001, 0b1110000000000011, opcode_e::CJAL},
|
||||
{16, 0b0100000000000001, 0b1110000000000011, opcode_e::CLI},
|
||||
{16, 0b0110000000000001, 0b1110000000000011, opcode_e::CLUI},
|
||||
{16, 0b0110000100000001, 0b1110111110000011, opcode_e::CADDI16SP},
|
||||
{16, 0b0110000000000001, 0b1111000001111111, opcode_e::__reserved_clui},
|
||||
{16, 0b1000000000000001, 0b1111110000000011, opcode_e::CSRLI},
|
||||
{16, 0b1000010000000001, 0b1111110000000011, opcode_e::CSRAI},
|
||||
{16, 0b1000100000000001, 0b1110110000000011, opcode_e::CANDI},
|
||||
{16, 0b1000110000000001, 0b1111110001100011, opcode_e::CSUB},
|
||||
{16, 0b1000110000100001, 0b1111110001100011, opcode_e::CXOR},
|
||||
{16, 0b1000110001000001, 0b1111110001100011, opcode_e::COR},
|
||||
{16, 0b1000110001100001, 0b1111110001100011, opcode_e::CAND},
|
||||
{16, 0b1010000000000001, 0b1110000000000011, opcode_e::CJ},
|
||||
{16, 0b1100000000000001, 0b1110000000000011, opcode_e::CBEQZ},
|
||||
{16, 0b1110000000000001, 0b1110000000000011, opcode_e::CBNEZ},
|
||||
{16, 0b0000000000000010, 0b1111000000000011, opcode_e::CSLLI},
|
||||
{16, 0b0100000000000010, 0b1110000000000011, opcode_e::CLWSP},
|
||||
{16, 0b1000000000000010, 0b1111000000000011, opcode_e::CMV},
|
||||
{16, 0b1000000000000010, 0b1111000001111111, opcode_e::CJR},
|
||||
{16, 0b1000000000000010, 0b1111111111111111, opcode_e::__reserved_cmv},
|
||||
{16, 0b1001000000000010, 0b1111000000000011, opcode_e::CADD},
|
||||
{16, 0b1001000000000010, 0b1111000001111111, opcode_e::CJALR},
|
||||
{16, 0b1001000000000010, 0b1111111111111111, opcode_e::CEBREAK},
|
||||
{16, 0b1100000000000010, 0b1110000000000011, opcode_e::CSWSP},
|
||||
{16, 0b0000000000000000, 0b1111111111111111, opcode_e::DII},
|
||||
}};
|
||||
|
||||
}
|
||||
|
||||
template<>
|
||||
struct instruction_decoder<tgc_c> {
|
||||
using opcode_e = traits<tgc_c>::opcode_e;
|
||||
using code_word_t=traits<tgc_c>::code_word_t;
|
||||
|
||||
struct instruction_pattern {
|
||||
uint32_t value;
|
||||
uint32_t mask;
|
||||
opcode_e id;
|
||||
};
|
||||
|
||||
std::array<std::vector<instruction_pattern>, 4> qlut;
|
||||
|
||||
template<typename T>
|
||||
unsigned decode_instruction(T);
|
||||
|
||||
instruction_decoder() {
|
||||
for (auto instr : instr_descr) {
|
||||
auto quadrant = instr.value & 0x3;
|
||||
qlut[quadrant].push_back(instruction_pattern{instr.value, instr.mask, instr.op});
|
||||
}
|
||||
for(auto& lut: qlut){
|
||||
std::sort(std::begin(lut), std::end(lut), [](instruction_pattern const& a, instruction_pattern const& b){
|
||||
return bit_count(a.mask) > bit_count(b.mask);
|
||||
});
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
template<>
|
||||
unsigned instruction_decoder<tgc_c>::decode_instruction<traits<tgc_c>::code_word_t>(traits<tgc_c>::code_word_t instr){
|
||||
auto res = std::find_if(std::begin(qlut[instr&0x3]), std::end(qlut[instr&0x3]), [instr](instruction_pattern const& e){
|
||||
return !((instr&e.mask) ^ e.value );
|
||||
});
|
||||
return static_cast<unsigned>(res!=std::end(qlut[instr&0x3])? res->id : opcode_e::MAX_OPCODE);
|
||||
}
|
||||
|
||||
|
||||
std::unique_ptr<instruction_decoder<tgc_c>> traits<tgc_c>::get_decoder(){
|
||||
return std::make_unique<instruction_decoder<tgc_c>>();
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
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Reference in New Issue