add option to configure number of irq
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07d5af1dde
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dd4c19a15c
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@ -218,6 +218,9 @@ public:
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csr[addr & csr.page_addr_mask] = val;
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}
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void set_irq_num(unsigned i) {
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mcause_max_irq=1<<util::ilog2(i);
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}
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protected:
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struct riscv_instrumentation_if : public iss::instrumentation_if {
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@ -777,7 +780,7 @@ template <typename BASE, features_e FEAT> iss::status riscv_hart_m_p<BASE, FEAT>
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}
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template <typename BASE, features_e FEAT> iss::status riscv_hart_m_p<BASE, FEAT>::write_cause(unsigned addr, reg_t val) {
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csr[mcause] = val & ((1UL<<(traits<BASE>::XLEN-1))|0xf); //TODO: make exception code size configurable
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csr[mcause] = val & ((1UL<<(traits<BASE>::XLEN-1))| (mcause_max_irq-1));
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return iss::Ok;
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}
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@ -1029,7 +1032,7 @@ template <typename BASE, features_e FEAT> uint64_t riscv_hart_m_p<BASE, FEAT>::e
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csr[mepc] = this->reg.NEXT_PC & get_pc_mask(); // store next address if interrupt
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this->reg.pending_trap = 0;
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}
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csr[mcause] = (trap_id << 31) + cause;
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csr[mcause] = (trap_id << (traits<BASE>::XLEN-1)) + cause;
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// update mstatus
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// xPP field of mstatus is written with the active privilege mode at the time
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// of the trap; the x PIE field of mstatus
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@ -233,6 +233,9 @@ public:
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csr[addr & csr.page_addr_mask] = val;
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}
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void set_irq_num(unsigned i) {
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mcause_max_irq=1<<util::ilog2(i);
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}
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protected:
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struct riscv_instrumentation_if : public iss::instrumentation_if {
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@ -959,7 +962,7 @@ template <typename BASE, features_e FEAT> iss::status riscv_hart_mu_p<BASE, FEAT
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}
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template <typename BASE, features_e FEAT> iss::status riscv_hart_mu_p<BASE, FEAT>::write_cause(unsigned addr, reg_t val) {
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csr[addr] = val & ((1UL<<(traits<BASE>::XLEN-1))|(mcause_max_irq-1)); //TODO: make exception code size configurable
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csr[addr] = val & ((1UL<<(traits<BASE>::XLEN-1))|(mcause_max_irq-1));
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return iss::Ok;
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}
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@ -1319,7 +1322,7 @@ template <typename BASE, features_e FEAT> uint64_t riscv_hart_mu_p<BASE, FEAT>::
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this->reg.pending_trap = 0;
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}
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size_t adr = ucause | (new_priv << 8);
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csr[adr] = (trap_id << 31) + cause;
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csr[adr] = (trap_id << (traits<BASE>::XLEN-1)) + cause;
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// update mstatus
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// xPP field of mstatus is written with the active privilege mode at the time
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// of the trap; the x PIE field of mstatus
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