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afe8905ac9
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fix else-ambiguity in CoreDSL description
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2022-01-31 20:30:46 +01:00 |
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ecc6091d1e
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cleans up source code to remove clang compiler warnings
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2022-01-19 08:01:15 +01:00 |
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07d5af1dde
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fix stand-alone ISS compilation to include all generated cores
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2021-11-26 17:56:40 +01:00 |
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6f8595759e
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make tgc-sim include all available ISS
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2021-11-25 20:00:27 +01:00 |
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f90c48e881
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adapt to changed define names
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2021-11-11 08:33:35 +01:00 |
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c42e336509
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fix proper debug mode handling (#267 & #268)
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2021-11-07 17:48:44 +01:00 |
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a89f00da19
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fix plugins parameter utilization
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2021-11-02 11:03:17 +01:00 |
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1616f0ac90
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remove deprecated functions
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2021-10-30 12:57:08 +02:00 |
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334d3fb296
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adapt to SCC changes
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2021-10-21 22:53:16 +02:00 |
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eb2ca33e5a
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remove unused sources
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2021-10-12 15:17:56 +02:00 |
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0ea4cba1ca
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add dynamic plugin loading
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2021-10-12 14:24:55 +02:00 |
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1d13c8196e
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fix wrong PGMASK usage
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2021-10-11 10:40:01 +02:00 |
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ee6e1d4092
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Merge remote-tracking branch 'origin/msvc_compat' into develop
Conflicts:
src/sysc/core_complex.cpp
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2021-10-11 09:42:40 +02:00 |
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c8679fca85
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remove MSVC warning
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2021-10-10 19:56:33 +02:00 |
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f0ada1ba8c
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add MSVC 16 compatibility
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2021-10-10 19:06:41 +02:00 |
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2f15d9676e
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fix unaligned instr fetch behavior
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2021-09-30 19:27:46 +02:00 |
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17ee7b138d
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update generated TGC-C VM
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2021-09-29 00:44:17 +02:00 |
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438e598a4a
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remove clutter from core descriptions, added instr alignment setting
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2021-09-29 00:03:11 +02:00 |
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174259155d
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add support for non-compressed ISA
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2021-09-23 21:09:52 +02:00 |
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65b4db5eca
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remove mcounteren in M-mode only platform
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2021-09-18 11:40:00 +02:00 |
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0fd82f1f3c
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add tgc_d_xrb_mac to SC and C++ ISS
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2021-09-04 13:04:34 +02:00 |
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09b01af3fa
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fix find_package use and debug access alignment check
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2021-08-26 22:10:27 +02:00 |
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2f05083cf0
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fix elf loader and pmp check for debug accesses
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2021-08-19 10:50:25 +02:00 |
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e934049dd4
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fix inconsistency due to PA adaptation
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2021-08-16 17:55:14 +02:00 |
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Eyck Jentzsch
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94f796ebdb
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add install target and PA compatibility
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2021-08-16 17:02:31 +02:00 |
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c8681096be
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update vm_tgfs_c to match CoreDSL
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2021-08-14 10:57:36 +02:00 |
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15f46a87db
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adapt core_complex to use scv-tr (scc commit id a3cde47)
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2021-07-27 09:38:05 +02:00 |
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e68918c2e8
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fix instruction decode
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2021-07-09 07:37:12 +02:00 |
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2f4b5bd9b2
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fix detailed behavior of TGC_C
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2021-07-06 21:19:36 +02:00 |
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23b9741adf
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refine and fix TGC_C iss to becoem compliant
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2021-06-29 11:51:30 +02:00 |
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5d8da08ce5
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fix linker issue
the root cuase of the issue is the template paramter deduction which led
to the wrong template parameter.
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2021-06-26 14:30:36 +02:00 |
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a249aea703
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getting rid of the error: reference to 'wait' is ambiguous
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2021-06-25 13:35:42 +02:00 |
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e432dd8208
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fix handling of exceptions while accessing address spaces
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2021-06-07 22:22:36 +02:00 |
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8c385647dd
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remove redundant code from checked in generated sources
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2021-05-26 23:06:31 +02:00 |
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aaceecd5dc
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fix mu_p platform features and CSRs
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2021-05-17 09:20:09 +02:00 |
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4b3f5a6b0c
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add missing change
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2021-05-16 16:44:30 +02:00 |
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d41e1d816a
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add factory for ISS and use it in main.cpp
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2021-05-16 16:44:14 +02:00 |
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a35974c9f5
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make cpu type in core_complex configurable
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2021-05-16 15:06:42 +02:00 |
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9c456ba8f2
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initial version of MU hart
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2021-05-14 13:29:39 +02:00 |
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c57884caee
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small fix
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2021-05-13 16:01:04 +02:00 |
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cf7b62a3f9
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update names
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2021-05-13 15:54:48 +02:00 |
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2f4cfb68dc
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update to latest SCC
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2021-04-07 18:56:46 +02:00 |
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7009943106
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fix wait for interrupt. Adapt for new SCC structure
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2021-04-07 17:42:08 +02:00 |
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32e4aa83b8
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use extracted variables
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2021-03-27 09:36:52 +00:00 |
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78c7064295
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update groovy template to extract used registers
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2021-03-26 08:24:45 +00:00 |
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ea3ff3c0cd
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build with SCV lib
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2021-03-23 11:57:47 +01:00 |
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b0bcb7febb
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small fixes for robustness and readability
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2021-03-22 22:47:30 +00:00 |
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51fbc34fb3
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change namespace of core complex
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2021-03-22 11:57:40 +00:00 |
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4e0f20eba0
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rework abort conditions
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2021-03-17 19:32:57 +00:00 |
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ff3fa19208
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fix RVM description bugs
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2021-03-13 10:46:41 +00:00 |
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