 eyck
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fd6b738168
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changes compile dependencies
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2023-05-11 23:43:12 +02:00 |
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eyck
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afdf8fb97f
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adds missing namespaces
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2023-05-11 23:11:04 +02:00 |
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eyck
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cfa7b72363
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changes time handling at sockets
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2023-05-06 19:57:29 +02:00 |
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eyck
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d330307ed5
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splits bus into 2 sockets for i/dbus
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2023-05-04 21:59:31 +02:00 |
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eyck
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916de2a26d
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changes build setup to compile specific files if a core is specified
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2023-05-04 16:08:33 +02:00 |
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eyck
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aa70d8a54a
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fixes CLIC to match clicinfo description in CLIC spec 11.04.2023
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2023-05-02 17:22:13 +02:00 |
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eyck
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b493745cd7
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sets reset start time to 0
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2023-05-02 11:21:42 +02:00 |
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eyck
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f9e8e1d857
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fixes core_complex wrt. tlm quantum and DMI
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2023-05-02 11:13:25 +02:00 |
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eyck
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974d64a627
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adds logo to imported instance
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2023-05-02 08:17:17 +02:00 |
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eyck
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d70489cbb8
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update import script to initialize broker
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2023-05-02 07:58:48 +02:00 |
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eyck
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d990f1cf5d
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fixes reading of 64bit CSR register
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2023-05-01 22:23:35 +02:00 |
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eyck
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1672b01e62
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adds WT cache functionality as mixin
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2023-04-28 20:38:07 +02:00 |
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eyck
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00b0f101ac
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adapts to changes of instrumentation interface in dbt-rise-core
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2023-04-28 20:38:07 +02:00 |
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eyck
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8ff55d7b92
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updates CWR dependent core_complex definition
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2023-04-14 19:34:41 +02:00 |
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eyck
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f626ee2684
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fixes privilege wrapper for M/U to cope with 64bit
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2023-04-05 15:38:25 +02:00 |
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eyck
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a8a2782329
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adds changes from latest CoreDSL description
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2023-04-04 16:10:12 +02:00 |
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eyck
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98dd329833
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fixes CSR access rights
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2023-04-04 09:23:08 +02:00 |
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eyck
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6213445bc4
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fixes 64bit behavior of CSR regs
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2023-03-27 12:04:43 +02:00 |
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eyck
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c5465bf9e2
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fixes according to fixed generator
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2023-03-26 14:44:15 +02:00 |
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eyck
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d881cb6e63
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fix data width of generated code
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2023-03-26 12:12:34 +02:00 |
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eyck
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2e4faa4d50
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fixes mstatus mask
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2023-03-25 09:14:56 +01:00 |
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eyck
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8e1951f298
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adds 64bit mstatus
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2023-03-23 07:47:21 +01:00 |
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eyck
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7efa924510
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fixes m/uintstatus read
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2023-03-17 10:51:39 +01:00 |
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eyck
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febbc4fff0
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fixes m/uintstatus read
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2023-03-17 10:23:05 +01:00 |
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eyck
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39b2788b7e
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implements and fixes CLIC CSR behavior
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2023-03-17 09:09:09 +01:00 |
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eyck
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a943dd3bdf
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fixes wrong array size which led to unintended CSR definitions
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2023-03-15 14:16:08 +01:00 |
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eyck
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fedbff5971
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fixes xcause and u-mode clic CSRs
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2023-03-15 12:27:39 +01:00 |
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eyck
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c2758e8321
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removes mscratchcsw from CLIC feature
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2023-03-15 09:07:00 +01:00 |
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eyck
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8be5fe71df
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fixes template name typo
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2023-03-12 07:42:09 +01:00 |
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eyck
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3f7ce41b9d
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fixes CLIC mtvt register behavior
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2023-03-11 14:03:03 +01:00 |
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eyck
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ad1cbedf00
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adds back missing max irq functions
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2023-03-11 12:47:10 +01:00 |
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eyck
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83f54b5074
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fixes CLICCFG settings
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2023-03-11 08:48:03 +01:00 |
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eyck
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a83928fd8c
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fixes CSR/CLIC implementation
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2023-03-10 20:40:21 +01:00 |
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eyck
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ec55efd322
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adds generator changed files
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2023-02-17 06:36:34 +01:00 |
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eyck
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8c3709f92a
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adds generator changed files
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2023-02-17 06:29:27 +01:00 |
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eyck
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207dbf1071
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fixes out of range access for register alias names
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2023-02-17 06:28:30 +01:00 |
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eyck
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62c118e501
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fixes CSR to match latest fast interrupts spec
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2023-01-20 16:21:04 +01:00 |
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eyck
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65dca13b42
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fixes WFI miss of interrupt
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2023-01-14 17:40:21 +01:00 |
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eyck
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3187cbdfe2
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removes CONAN_PKG from build system
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2022-12-12 02:55:44 +01:00 |
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eyck
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8c701d55c1
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adapt to latest changes in SCC
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2022-12-05 09:15:48 +01:00 |
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eyck
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f585489ff5
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fixes pin naming
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2022-10-26 17:21:44 +02:00 |
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eyck
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7113683ee0
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moves pending interrupt check before handling trap thus saving 1 cycle
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2022-10-15 10:47:35 +02:00 |
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eyck
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1a0fc4bd5d
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fixes wrong mcounteren in M-mode only priv wrapper
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2022-10-10 08:59:27 +02:00 |
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eyck
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40d1966e9a
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fixes pending irq within irq hander behavior
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2022-10-08 11:20:52 +02:00 |
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eyck
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a977200284
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cleans up priv wrappers
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2022-10-05 08:58:57 +02:00 |
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eyck
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b20fd3eba5
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fix static build
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2022-09-28 19:37:47 +02:00 |
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eyck
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b20daa1ac2
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fixes wrong path in install
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2022-09-27 09:11:41 +02:00 |
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eyck
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b1a18459e7
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adds more flexible use of availabel targets
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2022-09-26 13:57:24 +02:00 |
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eyck
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6ba7c82f80
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fixes wrapper definitions for hwl cores
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2022-09-26 13:31:46 +02:00 |
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eyck
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ad7bb28b4c
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fixes write mask of clic memory mapped registers
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2022-09-17 12:15:19 +02:00 |
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eyck
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fa7eda0889
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fixes wrong check for exception
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2022-08-31 11:45:53 +02:00 |
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eyck
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00e02bf565
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adds support for different branch types in tracing
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2022-08-08 06:30:37 +02:00 |
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eyck
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1ad66a71d8
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extends supported break point types
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2022-08-06 09:53:24 +02:00 |
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eyck
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e60fa3d5e6
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adaptes to changes in dbt-rise-core
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2022-08-06 09:49:32 +02:00 |
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eyck
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8407f6287f
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replaces core_complex socket
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2022-07-24 20:52:28 +02:00 |
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eyck
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0833198d34
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aads missing windows compat firx to template
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2022-07-23 14:36:23 +02:00 |
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eyck
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57347ae4d9
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fixes cppcheck flagged issues
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2022-07-23 13:49:10 +02:00 |
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eyck
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4876f18ba9
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adds windows compatibility fixes
|
2022-07-18 11:43:42 +02:00 |
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eyck
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a53ee42e13
|
updates TGC_C according to CoreDSL description update
|
2022-07-12 22:34:22 +02:00 |
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eyck
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12ccfc055a
|
updates generate tgc_c definition
|
2022-07-11 22:58:10 +02:00 |
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eyck
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feaa49d367
|
removes decoder again as there is some issue
|
2022-06-20 00:39:11 +02:00 |
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eyck
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18f33b4a68
|
fixes ordering of instructions for decoding
|
2022-06-19 16:52:29 +02:00 |
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eyck
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f096b15dbd
|
factors decoder into separate component
|
2022-06-19 13:17:31 +02:00 |
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eyck
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cb5375258a
|
removes compilatioon of unneeded files
|
2022-06-10 07:19:46 +02:00 |
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eyck
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076b5a39ad
|
fix class naming
|
2022-06-02 08:30:49 +02:00 |
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eyck
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f40ab41899
|
fix left-over from layout refactoring
|
2022-06-02 08:30:02 +02:00 |
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eyck
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e8fd5143bc
|
fix build options for standalone ISS
|
2022-05-31 11:05:26 +02:00 |
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eyck
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31fb51de95
|
update tgc_c generated code
|
2022-05-30 22:15:44 +02:00 |
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eyck
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5d481eb79d
|
fix generation of non-exception code
|
2022-05-30 22:04:16 +02:00 |
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eyck
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1c90fe765d
|
Merge remote-tracking branch 'origin/Trace_enhancement' into develop
|
2022-05-30 14:18:09 +02:00 |
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eyck
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52ed8b81a6
|
fixed template to work with previous code generator
|
2022-05-30 14:08:02 +02:00 |
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eyck
|
0703a0a845
|
update tgc-mapper
|
2022-05-30 07:45:32 +02:00 |
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eyck
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0c542d42aa
|
separate generated sources
|
2022-05-21 12:48:28 +02:00 |
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eyck
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966d1616c5
|
change source code to unified layout
|
2022-05-21 11:55:24 +02:00 |
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eyck
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df16378605
|
update template for changed code generator
|
2022-05-18 19:10:34 +02:00 |
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eyck
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1438f0f373
|
add backannotation to pc trace plugin
|
2022-05-17 15:29:04 +02:00 |
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eyck
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766f3ba9ee
|
fix assertion in compressed pctrace writer
|
2022-05-13 12:38:12 +02:00 |
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eyck
|
5da4e6b424
|
fix alignment check for unaligned debugger accesses
|
2022-05-13 12:37:47 +02:00 |
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eyck
|
e382217e04
|
update vm_tgc_c due reworked CoreDSL generator
|
2022-05-11 18:52:15 +02:00 |
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|
eyck
|
9db4e3fd87
|
fix assertion
|
2022-05-10 16:13:21 +02:00 |
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|
eyck
|
e56bc12788
|
fix non-lz4 build of plugin
|
2022-05-07 17:27:11 +02:00 |
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|
eyck
|
e88f309ea2
|
add lz4 compression to pctrace
|
2022-05-07 17:22:06 +02:00 |
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|
eyck
|
03bec27376
|
implement extended instrumentation interface
|
2022-04-26 17:14:33 +02:00 |
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|
eyck
|
9d9008a3a2
|
fix pointer mess
|
2022-04-26 15:35:17 +02:00 |
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|
eyck
|
a92b84bef4
|
add code word access for ISS plugins
|
2022-04-25 14:18:19 +02:00 |
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|
eyck
|
477c530847
|
extend debug mode handling
|
2022-04-13 11:41:01 +02:00 |
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|
eyck
|
c054d75717
|
update to latest coredsl description
|
2022-04-10 18:55:44 +02:00 |
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|
eyck
|
15cd26f800
|
remove CoreDSL ISA repo
|
2022-04-10 12:15:40 +02:00 |
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|
eyck
|
9465cffe79
|
adapt to change in dbt-rise-core
|
2022-04-09 14:55:36 +02:00 |
|
|
eyck
|
00d2d06cbd
|
adapt to privileged spec
|
2022-03-31 20:33:12 +02:00 |
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|
eyck
|
8e4e702cb9
|
Merge remote-tracking branch 'origin/feature/reduced_output' into develop
|
2022-03-28 14:09:06 +02:00 |
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|
eyck
|
49be143588
|
make features configurable
|
2022-03-27 17:54:08 +02:00 |
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|
eyck
|
0aea1d0177
|
remove mcounteren in M-mode only wrapper
|
2022-03-27 17:21:46 +02:00 |
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|
eyck
|
6ea7721961
|
add TCM
|
2022-03-27 15:38:18 +02:00 |
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|
eyck
|
b0cb997009
|
add TGC_X with DMR
|
2022-03-26 10:48:21 +01:00 |
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|
eyck
|
9dfca612b7
|
add hardware loop CSR access
|
2022-03-25 11:33:44 +01:00 |
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|
eyck
|
30ae743361
|
add pctrace plugin to iss
|
2022-03-20 17:41:54 +01:00 |
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|
eyck
|
d91f5f9df4
|
fix compiler warning for reduced number of registers
|
2022-03-14 15:38:05 +01:00 |
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|
eyck
|
2e670c4d03
|
change interpreter structure
|
2022-03-06 15:11:38 +01:00 |
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|
eyck
|
3d32c33333
|
update gitignore
|
2022-03-05 20:59:45 +01:00 |
|