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9f5326c110
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extends htif for 32bit systems
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2025-02-13 13:39:47 +01:00 |
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f4718c6de3
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Merge remote-tracking branch 'origin/feature/htif' into develop
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2025-02-13 09:34:31 +01:00 |
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53de21eef9
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adds generator changed output
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2025-02-12 20:45:04 +01:00 |
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be0f783af8
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adds cycle increment to tcc
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2024-12-28 13:06:46 +01:00 |
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1089800682
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updates vm_impls and core.h to work with new vm_base
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2024-12-28 08:24:09 +01:00 |
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d907dc7f54
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corrects tohost functionality and minor cleanup
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2024-11-22 17:35:12 +01:00 |
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75e81ce236
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copies new tohost implemenation from hart_m_p
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2024-11-14 16:51:26 +01:00 |
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82a70efdb8
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small reorder to make tohost output more readable
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2024-11-14 16:51:26 +01:00 |
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978c3db06e
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minor improvements to readability
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2024-11-14 16:51:26 +01:00 |
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0e88664ff7
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adds better tohost writing implementation, allowing the standard riscv-isa-test benchmarks to run
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2024-11-14 16:51:26 +01:00 |
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1fb7e8fcea
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improves logging output
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2024-09-24 08:39:34 +02:00 |
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4c0d1c75aa
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adds addr formatting to logging
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2024-09-23 12:21:43 +02:00 |
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2f3abf2f76
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adds namespaces for ELFIO
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2024-09-23 11:55:18 +02:00 |
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62768bf81e
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applies clang format
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2024-09-23 10:05:33 +02:00 |
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a8f56b6e27
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removes code dupication by unifying elf file read
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2024-09-23 09:28:27 +02:00 |
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64329cf0f6
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fixes use of icount vs. cycle
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2024-08-17 19:36:40 +02:00 |
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bb4e2766d1
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applies clang-format
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2024-08-17 16:12:57 +02:00 |
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de79adc50d
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updates debugger hook to stop before fetching instructions
this relates to https://github.com/Minres/DBT-RISE-RISCV/issues/8 :
Debugger loses control when trap vector fetch fails
and https://github.com/Minres/DBT-RISE-RISCV/issues/7 : Two debugger
single-steps are required at reset vector
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2024-08-17 12:39:54 +02:00 |
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b3cc9d2346
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makes core_complex a template
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2024-08-04 18:47:32 +02:00 |
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21f8eab432
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adds regenerated tgc5c
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2024-08-02 19:18:28 +02:00 |
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6ddb8da07f
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fixes missing rename
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2024-08-02 11:58:51 +02:00 |
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edf456c59f
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fixes missing braces
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2024-08-02 10:33:15 +02:00 |
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42efced1eb
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fixes FCSR behavior if no floating point is implemented
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2024-08-02 08:59:22 +02:00 |
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39d2518fdd
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checkin: tgc5f builds and runs through
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2024-07-31 12:30:41 +02:00 |
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a365110054
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fix format
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2024-07-30 13:34:23 +02:00 |
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d2efb23ff7
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fixes cache behavior for fetches
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2024-07-25 19:33:50 +02:00 |
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e87b7d5fd0
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applies clang-format
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2024-07-24 14:48:50 +02:00 |
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5a2b96ef3e
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adds logging categories for ISS
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2024-07-24 12:30:07 +02:00 |
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375755999a
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integrates new tval changes
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2024-07-16 15:32:35 +02:00 |
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9996fd4833
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change cache line size to 64
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2024-07-11 14:03:58 +02:00 |
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149b3136d2
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updates generated files
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2024-07-10 12:55:36 +02:00 |
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b2cbf90d0b
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updates generated files
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2024-07-10 12:51:59 +02:00 |
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4cfb15c7cd
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Asmjit and interp working
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2024-07-10 12:51:31 +02:00 |
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63da7f8d57
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applies clang-format
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2024-07-09 13:57:11 +02:00 |
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fb4012fbd1
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moves likely annotation
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2024-07-09 13:52:10 +02:00 |
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24449f1c0f
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fixes some elf load issue
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2024-07-05 12:18:36 +02:00 |
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8460f4ab7f
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updates templates to re-enable interactive debugging of generator
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2024-06-21 10:46:11 +02:00 |
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3fd51cc68c
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fixes templates
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2024-06-14 19:54:33 +02:00 |
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551822916c
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applies clang-format
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2024-06-14 17:43:12 +02:00 |
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41051f8f34
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fixes tohost handling
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2024-05-31 10:43:38 +02:00 |
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gabriel
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a6c48ceaac
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2024-05-31 09:42:13 +02:00 |
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gabriel
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ed793471bb
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adding semhosting
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2024-05-31 07:27:47 +02:00 |
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001c6349f7
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removes tcc sim stop when writing to tohost
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2024-05-11 15:16:46 +02:00 |
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f0a004be9d
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adds information for debugging
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2024-05-09 13:42:16 +02:00 |
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fbcd389580
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fix log macro
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2024-04-15 13:03:47 +02:00 |
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b25b7848c6
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fix formatting
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2024-03-19 11:47:12 +01:00 |
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6c986d38d8
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2024-03-19 11:02:17 +01:00 |
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a1ebd83d2a
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adds riscv_hart_common and signature output
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2024-03-19 11:02:03 +01:00 |
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8aed551813
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Add a new LOG macro in SCC to avoid conflicts with other libraries.
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2024-03-14 09:43:08 +01:00 |
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119d4a8b43
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adds generation if IMEM space
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2024-02-21 07:08:24 +01:00 |
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