fixes missing braces
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42efced1eb
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edf456c59f
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@ -448,9 +448,10 @@ riscv_hart_m_p<BASE, FEAT, LOGCAT>::riscv_hart_m_p(feature_config cfg)
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csr[mimpid] = 1;
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uart_buf.str("");
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if(traits<BASE>::FLEN > 0)
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if(traits<BASE>::FLEN > 0) {
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csr_rd_cb[fcsr] = &this_class::read_fcsr;
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csr_wr_cb[fcsr] = &this_class::write_fcsr;
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csr_wr_cb[fcsr] = &this_class::write_fcsr;
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}
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for(unsigned addr = mhpmcounter3; addr <= mhpmcounter31; ++addr) {
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csr_rd_cb[addr] = &this_class::read_null;
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csr_wr_cb[addr] = &this_class::write_plain;
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@ -478,9 +478,10 @@ riscv_hart_mu_p<BASE, FEAT, LOGCAT>::riscv_hart_mu_p(feature_config cfg)
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csr[mimpid] = 1;
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uart_buf.str("");
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if(traits<BASE>::FLEN > 0)
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if(traits<BASE>::FLEN > 0) {
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csr_rd_cb[fcsr] = &this_class::read_fcsr;
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csr_wr_cb[fcsr] = &this_class::write_fcsr;
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csr_wr_cb[fcsr] = &this_class::write_fcsr;
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}
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for(unsigned addr = mhpmcounter3; addr <= mhpmcounter31; ++addr) {
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csr_rd_cb[addr] = &this_class::read_null;
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csr_wr_cb[addr] = &this_class::write_plain;
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