From edf456c59f9e5a7f69966e4ea6f2583d16ca3719 Mon Sep 17 00:00:00 2001 From: Eyck Jentzsch Date: Fri, 2 Aug 2024 10:33:15 +0200 Subject: [PATCH] fixes missing braces --- src/iss/arch/riscv_hart_m_p.h | 5 +++-- src/iss/arch/riscv_hart_mu_p.h | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/src/iss/arch/riscv_hart_m_p.h b/src/iss/arch/riscv_hart_m_p.h index c3311fd..f808891 100644 --- a/src/iss/arch/riscv_hart_m_p.h +++ b/src/iss/arch/riscv_hart_m_p.h @@ -448,9 +448,10 @@ riscv_hart_m_p::riscv_hart_m_p(feature_config cfg) csr[mimpid] = 1; uart_buf.str(""); - if(traits::FLEN > 0) + if(traits::FLEN > 0) { csr_rd_cb[fcsr] = &this_class::read_fcsr; - csr_wr_cb[fcsr] = &this_class::write_fcsr; + csr_wr_cb[fcsr] = &this_class::write_fcsr; + } for(unsigned addr = mhpmcounter3; addr <= mhpmcounter31; ++addr) { csr_rd_cb[addr] = &this_class::read_null; csr_wr_cb[addr] = &this_class::write_plain; diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h index d3d0a09..bfcb31d 100644 --- a/src/iss/arch/riscv_hart_mu_p.h +++ b/src/iss/arch/riscv_hart_mu_p.h @@ -478,9 +478,10 @@ riscv_hart_mu_p::riscv_hart_mu_p(feature_config cfg) csr[mimpid] = 1; uart_buf.str(""); - if(traits::FLEN > 0) + if(traits::FLEN > 0) { csr_rd_cb[fcsr] = &this_class::read_fcsr; - csr_wr_cb[fcsr] = &this_class::write_fcsr; + csr_wr_cb[fcsr] = &this_class::write_fcsr; + } for(unsigned addr = mhpmcounter3; addr <= mhpmcounter31; ++addr) { csr_rd_cb[addr] = &this_class::read_null; csr_wr_cb[addr] = &this_class::write_plain;