Asmjit and interp working
This commit is contained in:
parent
63da7f8d57
commit
4cfb15c7cd
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (C) 20217-2024 MINRES Technologies GmbH
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* Copyright (C) 2017-2024 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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File diff suppressed because one or more lines are too long
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@ -344,7 +344,7 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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(uint32_t)((int32_t)imm));
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(uint32_t)((int32_t)imm));
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}
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}
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auto returnValue = CONT;
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@ -390,7 +390,7 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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(uint32_t)(PC+(int32_t)imm));
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(uint32_t)(PC+(int32_t)imm));
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}
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}
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auto returnValue = CONT;
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@ -440,7 +440,7 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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(uint32_t)(PC+4));
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(uint32_t)(PC+4));
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}
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auto PC_val_v = (uint32_t)(PC+(int32_t)sext<21>(imm));
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cc.mov(jh.next_pc, PC_val_v);
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@ -507,7 +507,7 @@ private:
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{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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(uint32_t)(PC+4));
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(uint32_t)(PC+4));
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}
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auto PC_val_v = new_pc;
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cc.mov(jh.next_pc, PC_val_v);
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@ -916,8 +916,8 @@ private:
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gen_read_mem(jh, traits::MEM, load_address, 1), 8, false);
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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res, 32, true));
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gen_ext(jh,
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res, 32, true));
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}
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}
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auto returnValue = CONT;
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@ -969,8 +969,8 @@ private:
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gen_read_mem(jh, traits::MEM, load_address, 2), 16, false);
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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res, 32, true));
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gen_ext(jh,
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res, 32, true));
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}
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}
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auto returnValue = CONT;
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@ -1022,8 +1022,8 @@ private:
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gen_read_mem(jh, traits::MEM, load_address, 4), 32, false);
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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res, 32, true));
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gen_ext(jh,
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res, 32, true));
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}
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}
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auto returnValue = CONT;
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@ -1074,8 +1074,8 @@ private:
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auto res = gen_read_mem(jh, traits::MEM, load_address, 1);
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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res, 32, false));
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gen_ext(jh,
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res, 32, false));
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}
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}
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auto returnValue = CONT;
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@ -1126,8 +1126,8 @@ private:
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auto res = gen_read_mem(jh, traits::MEM, load_address, 2);
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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res, 32, false));
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gen_ext(jh,
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res, 32, false));
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}
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}
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auto returnValue = CONT;
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@ -1318,9 +1318,9 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm))
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), 32, true));
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gen_ext(jh,
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(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int16_t)sext<12>(imm))
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), 32, true));
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}
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}
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auto returnValue = CONT;
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@ -1379,8 +1379,8 @@ private:
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cc.mov(tmp_reg,1);
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cc.bind(label_merge);
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh, tmp_reg
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, 32, false)
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gen_ext(jh, tmp_reg
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, 32, false)
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);
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}
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}
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@ -1440,8 +1440,8 @@ private:
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cc.mov(tmp_reg,1);
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cc.bind(label_merge);
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh, tmp_reg
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, 32, false)
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gen_ext(jh, tmp_reg
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, 32, false)
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);
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}
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}
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@ -1490,8 +1490,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm)))
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);
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gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm)))
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);
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}
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}
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auto returnValue = CONT;
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@ -1538,8 +1538,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm)))
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);
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gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm)))
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);
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}
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}
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auto returnValue = CONT;
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@ -1586,8 +1586,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm)))
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);
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gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), (uint32_t)((int16_t)sext<12>(imm)))
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);
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}
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}
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auto returnValue = CONT;
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@ -1634,8 +1634,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), shamt)
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);
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gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), shamt)
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);
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}
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}
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auto returnValue = CONT;
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@ -1682,8 +1682,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), shamt)
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);
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gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), shamt)
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);
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}
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}
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auto returnValue = CONT;
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@ -1730,10 +1730,10 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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(gen_operation(jh, sar, gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), shamt)
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), 32, false));
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gen_ext(jh,
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(gen_operation(jh, sar, gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), shamt)
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), 32, false));
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}
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}
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auto returnValue = CONT;
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@ -1780,9 +1780,9 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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), 32, false));
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gen_ext(jh,
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(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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), 32, false));
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}
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}
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auto returnValue = CONT;
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@ -1829,9 +1829,9 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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(gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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), 32, true));
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gen_ext(jh,
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(gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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), 32, true));
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}
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}
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auto returnValue = CONT;
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh, gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast<uint32_t>(traits::XLEN)-1))
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))
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, 32, false));
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gen_ext(jh, gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast<uint32_t>(traits::XLEN)-1))
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))
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, 32, false));
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}
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}
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auto returnValue = CONT;
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@ -1940,8 +1940,8 @@ private:
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cc.mov(tmp_reg,1);
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cc.bind(label_merge);
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh, tmp_reg
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, 32, false)
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gen_ext(jh, tmp_reg
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, 32, false)
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);
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}
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}
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@ -2001,8 +2001,8 @@ private:
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cc.mov(tmp_reg,1);
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cc.bind(label_merge);
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh, tmp_reg
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, 32, false)
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gen_ext(jh, tmp_reg
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, 32, false)
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);
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}
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}
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@ -2051,8 +2051,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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);
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gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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);
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}
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}
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auto returnValue = CONT;
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@ -2099,9 +2099,9 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh, gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast<uint32_t>(traits::XLEN)-1))
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))
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, 32, false));
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gen_ext(jh, gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast<uint32_t>(traits::XLEN)-1))
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))
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, 32, false));
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}
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}
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auto returnValue = CONT;
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@ -2148,11 +2148,11 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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(gen_ext(jh, gen_operation(jh, sar, gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast<uint32_t>(traits::XLEN)-1))
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))
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, 32, true)), 32, true));
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gen_ext(jh,
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(gen_ext(jh, gen_operation(jh, sar, gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), (gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs2), (static_cast<uint32_t>(traits::XLEN)-1))
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))
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, 32, true)), 32, true));
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}
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}
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auto returnValue = CONT;
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@ -2199,8 +2199,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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);
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gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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);
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}
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}
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auto returnValue = CONT;
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@ -2247,8 +2247,8 @@ private:
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else{
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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);
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gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
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);
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}
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}
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auto returnValue = CONT;
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@ -2479,7 +2479,7 @@ private:
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auto xrd = gen_read_mem(jh, traits::CSR, csr, 4);
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gen_write_mem(jh, traits::CSR, csr, xrs1, 4);
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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xrd);
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xrd);
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}
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else{
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gen_write_mem(jh, traits::CSR, csr, xrs1, 4);
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@ -2535,7 +2535,7 @@ private:
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}
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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xrd);
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xrd);
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}
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}
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auto returnValue = CONT;
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@ -2588,7 +2588,7 @@ private:
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}
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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xrd);
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xrd);
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}
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}
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auto returnValue = CONT;
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|
@ -2637,7 +2637,7 @@ private:
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gen_write_mem(jh, traits::CSR, csr, (uint32_t)zimm, 4);
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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xrd);
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xrd);
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}
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}
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auto returnValue = CONT;
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|
@ -2689,7 +2689,7 @@ private:
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}
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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xrd);
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xrd);
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}
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}
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auto returnValue = CONT;
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|
@ -2741,7 +2741,7 @@ private:
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}
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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xrd);
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xrd);
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}
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}
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auto returnValue = CONT;
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|
@ -2825,14 +2825,14 @@ private:
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto res = gen_operation(jh, imul, gen_ext(jh,
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auto res = gen_operation(jh, smul, gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs2), 32, true))
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;
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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res, 32, true));
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gen_ext(jh,
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res, 32, true));
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}
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}
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auto returnValue = CONT;
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|
@ -2877,15 +2877,15 @@ private:
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto res = gen_operation(jh, imul, gen_ext(jh,
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auto res = gen_operation(jh, smul, gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs2), 32, true))
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;
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
|
||||
(gen_operation(jh, sar, res, static_cast<uint32_t>(traits::XLEN))
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sar, res, static_cast<uint32_t>(traits::XLEN))
|
||||
), 32, true));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -2930,14 +2930,14 @@ private:
|
|||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = gen_operation(jh, imul, gen_ext(jh,
|
||||
auto res = gen_operation(jh, sumul, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
;
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sar, res, static_cast<uint32_t>(traits::XLEN))
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sar, res, static_cast<uint32_t>(traits::XLEN))
|
||||
), 32, true));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -2982,14 +2982,13 @@ private:
|
|||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = gen_operation(jh, mul,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1),
|
||||
load_reg_from_mem(jh, traits::X0 + rs2));
|
||||
auto res = gen_operation(jh, umul, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
;
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, shr, res, static_cast<uint32_t>(traits::XLEN))
|
||||
), 32, false));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, shr, res, static_cast<uint32_t>(traits::XLEN))
|
||||
), 32, false));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -3055,15 +3054,15 @@ private:
|
|||
cc.je(label_else);
|
||||
{
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
MMIN);
|
||||
MMIN);
|
||||
}
|
||||
cc.jmp(label_merge);
|
||||
cc.bind(label_else);
|
||||
{
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, idiv, dividend, divisor)
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sdiv, dividend, divisor)
|
||||
), 32, true));
|
||||
}
|
||||
cc.bind(label_merge);
|
||||
}
|
||||
|
@ -3071,7 +3070,7 @@ private:
|
|||
cc.bind(label_else);
|
||||
{
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
(uint32_t)- 1);
|
||||
(uint32_t)- 1);
|
||||
}
|
||||
cc.bind(label_merge);
|
||||
}
|
||||
|
@ -3126,8 +3125,8 @@ private:
|
|||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_operation(jh, div, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
);
|
||||
gen_operation(jh, udiv, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
);
|
||||
}
|
||||
}
|
||||
cc.jmp(label_merge);
|
||||
|
@ -3135,7 +3134,7 @@ private:
|
|||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
(uint32_t)- 1);
|
||||
(uint32_t)- 1);
|
||||
}
|
||||
}
|
||||
cc.bind(label_merge);
|
||||
|
@ -3200,7 +3199,7 @@ private:
|
|||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh, 0, 32, false)
|
||||
gen_ext(jh, 0, 32, false)
|
||||
);
|
||||
}
|
||||
}
|
||||
|
@ -3209,11 +3208,11 @@ private:
|
|||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, srem, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true))
|
||||
), 32, false));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, srem, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true))
|
||||
), 32, false));
|
||||
}
|
||||
}
|
||||
cc.bind(label_merge);
|
||||
|
@ -3223,7 +3222,7 @@ private:
|
|||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
load_reg_from_mem(jh, traits::X0 + rs1));
|
||||
load_reg_from_mem(jh, traits::X0 + rs1));
|
||||
}
|
||||
}
|
||||
cc.bind(label_merge);
|
||||
|
@ -3278,8 +3277,8 @@ private:
|
|||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_operation(jh, urem, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
);
|
||||
gen_operation(jh, urem, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
);
|
||||
}
|
||||
}
|
||||
cc.jmp(label_merge);
|
||||
|
@ -3287,7 +3286,7 @@ private:
|
|||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
load_reg_from_mem(jh, traits::X0 + rs1));
|
||||
load_reg_from_mem(jh, traits::X0 + rs1));
|
||||
}
|
||||
}
|
||||
cc.bind(label_merge);
|
||||
|
@ -3331,9 +3330,9 @@ private:
|
|||
/*generate behavior*/
|
||||
if(imm){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd+8),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), imm)
|
||||
), 32, false));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), imm)
|
||||
), 32, false));
|
||||
}
|
||||
else{
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
|
@ -3380,9 +3379,9 @@ private:
|
|||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1+8), uimm)
|
||||
), 32, false);
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd+8),
|
||||
gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
gen_read_mem(jh, traits::MEM, offs, 4), 32, false), 32, true));
|
||||
gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
gen_read_mem(jh, traits::MEM, offs, 4), 32, false), 32, true));
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
|
@ -3469,9 +3468,9 @@ private:
|
|||
else{
|
||||
if(rs1!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rs1),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int8_t)sext<6>(imm))
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rs1), (int8_t)sext<6>(imm))
|
||||
), 32, true));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -3546,7 +3545,7 @@ private:
|
|||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ 1),
|
||||
(uint32_t)(PC+2));
|
||||
(uint32_t)(PC+2));
|
||||
auto PC_val_v = (uint32_t)(PC+(int16_t)sext<12>(imm));
|
||||
cc.mov(jh.next_pc, PC_val_v);
|
||||
cc.mov(get_ptr_for(jh, traits::LAST_BRANCH), 32U);
|
||||
|
@ -3593,7 +3592,7 @@ private:
|
|||
else{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
(uint32_t)((int8_t)sext<6>(imm)));
|
||||
(uint32_t)((int8_t)sext<6>(imm)));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -3638,7 +3637,7 @@ private:
|
|||
}
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
(uint32_t)((int32_t)sext<18>(imm)));
|
||||
(uint32_t)((int32_t)sext<18>(imm)));
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
||||
|
@ -3678,9 +3677,9 @@ private:
|
|||
/*generate behavior*/
|
||||
if(nzimm){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ 2),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), (int16_t)sext<10>(nzimm))
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), (int16_t)sext<10>(nzimm))
|
||||
), 32, true));
|
||||
}
|
||||
else{
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
|
@ -3759,8 +3758,8 @@ private:
|
|||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rs1+8),
|
||||
gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1+8), shamt)
|
||||
);
|
||||
gen_operation(jh, shr, load_reg_from_mem(jh, traits::X0 + rs1+8), shamt)
|
||||
);
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
|
@ -3800,18 +3799,18 @@ private:
|
|||
/*generate behavior*/
|
||||
if(shamt){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rs1+8),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sar, (gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1+8), 32, false)), shamt)
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sar, (gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1+8), 32, false)), shamt)
|
||||
), 32, true));
|
||||
}
|
||||
else{
|
||||
if(static_cast<uint32_t>(traits::XLEN)==128){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rs1+8),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sar, (gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1+8), 32, false)), 64)
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sar, (gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1+8), 32, false)), 64)
|
||||
), 32, true));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -3852,9 +3851,9 @@ private:
|
|||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rs1+8),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1+8), (int8_t)sext<6>(imm))
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rs1+8), (int8_t)sext<6>(imm))
|
||||
), 32, true));
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
|
@ -3893,9 +3892,9 @@ private:
|
|||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd+8),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
), 32, true));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, sub, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
), 32, true));
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
|
@ -3934,8 +3933,8 @@ private:
|
|||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd+8),
|
||||
gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
);
|
||||
gen_operation(jh, bxor, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
);
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
|
@ -3974,8 +3973,8 @@ private:
|
|||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd+8),
|
||||
gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
);
|
||||
gen_operation(jh, bor, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
);
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
|
@ -4014,8 +4013,8 @@ private:
|
|||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd+8),
|
||||
gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
);
|
||||
gen_operation(jh, band, load_reg_from_mem(jh, traits::X0 + rd+8), load_reg_from_mem(jh, traits::X0 + rs2+8))
|
||||
);
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
|
@ -4192,8 +4191,8 @@ private:
|
|||
else{
|
||||
if(rs1!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rs1),
|
||||
gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), nzuimm)
|
||||
);
|
||||
gen_operation(jh, shl, load_reg_from_mem(jh, traits::X0 + rs1), nzuimm)
|
||||
);
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -4241,9 +4240,9 @@ private:
|
|||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + 2), uimm)
|
||||
), 32, false);
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
gen_read_mem(jh, traits::MEM, offs, 4), 32, false), 32, true));
|
||||
gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
gen_read_mem(jh, traits::MEM, offs, 4), 32, false), 32, true));
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
||||
|
@ -4288,7 +4287,7 @@ private:
|
|||
else{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
load_reg_from_mem(jh, traits::X0 + rs2));
|
||||
load_reg_from_mem(jh, traits::X0 + rs2));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -4414,9 +4413,9 @@ private:
|
|||
else{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rd), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
), 32, false));
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, add, load_reg_from_mem(jh, traits::X0 + rd), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
), 32, false));
|
||||
}
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
@ -4461,7 +4460,7 @@ private:
|
|||
else{
|
||||
auto new_pc = load_reg_from_mem(jh, traits::X0 + rs1);
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ 1),
|
||||
(uint32_t)(PC+2));
|
||||
(uint32_t)(PC+2));
|
||||
auto PC_val_v = gen_operation(jh, band, new_pc, ~ 1)
|
||||
;
|
||||
cc.mov(jh.next_pc, PC_val_v);
|
||||
|
|
|
@ -732,9 +732,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
}
|
||||
else {
|
||||
uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) ));
|
||||
int8_t res_27 = super::template read_mem<int8_t>(traits::MEM, load_address);
|
||||
int8_t res_40 = super::template read_mem<int8_t>(traits::MEM, load_address);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
int8_t res = (int8_t)res_27;
|
||||
int8_t res = (int8_t)res_40;
|
||||
if(rd != 0) {
|
||||
*(X+rd) = (uint32_t)res;
|
||||
}
|
||||
|
@ -763,9 +763,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
}
|
||||
else {
|
||||
uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) ));
|
||||
int16_t res_28 = super::template read_mem<int16_t>(traits::MEM, load_address);
|
||||
int16_t res_41 = super::template read_mem<int16_t>(traits::MEM, load_address);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
int16_t res = (int16_t)res_28;
|
||||
int16_t res = (int16_t)res_41;
|
||||
if(rd != 0) {
|
||||
*(X+rd) = (uint32_t)res;
|
||||
}
|
||||
|
@ -794,9 +794,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
}
|
||||
else {
|
||||
uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) ));
|
||||
int32_t res_29 = super::template read_mem<int32_t>(traits::MEM, load_address);
|
||||
int32_t res_42 = super::template read_mem<int32_t>(traits::MEM, load_address);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
int32_t res = (int32_t)res_29;
|
||||
int32_t res = (int32_t)res_42;
|
||||
if(rd != 0) {
|
||||
*(X+rd) = (uint32_t)res;
|
||||
}
|
||||
|
@ -825,9 +825,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
}
|
||||
else {
|
||||
uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) ));
|
||||
uint8_t res_30 = super::template read_mem<uint8_t>(traits::MEM, load_address);
|
||||
uint8_t res_43 = super::template read_mem<uint8_t>(traits::MEM, load_address);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint8_t res = res_30;
|
||||
uint8_t res = res_43;
|
||||
if(rd != 0) {
|
||||
*(X+rd) = (uint32_t)res;
|
||||
}
|
||||
|
@ -856,9 +856,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
}
|
||||
else {
|
||||
uint32_t load_address = (uint32_t)((uint64_t)(*(X+rs1) ) + (uint64_t)((int16_t)sext<12>(imm) ));
|
||||
uint16_t res_31 = super::template read_mem<uint16_t>(traits::MEM, load_address);
|
||||
uint16_t res_44 = super::template read_mem<uint16_t>(traits::MEM, load_address);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint16_t res = res_31;
|
||||
uint16_t res = res_44;
|
||||
if(rd != 0) {
|
||||
*(X+rd) = (uint32_t)res;
|
||||
}
|
||||
|
@ -1556,9 +1556,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
else {
|
||||
uint32_t xrs1 = *(X+rs1);
|
||||
if(rd != 0) {
|
||||
uint32_t res_32 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
uint32_t res_45 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint32_t xrd = res_32;
|
||||
uint32_t xrd = res_45;
|
||||
super::template write_mem<uint32_t>(traits::CSR, csr, xrs1);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
*(X+rd) = xrd;
|
||||
|
@ -1591,9 +1591,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION);
|
||||
}
|
||||
else {
|
||||
uint32_t res_33 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
uint32_t res_46 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint32_t xrd = res_33;
|
||||
uint32_t xrd = res_46;
|
||||
uint32_t xrs1 = *(X+rs1);
|
||||
if(rs1 != 0) {
|
||||
super::template write_mem<uint32_t>(traits::CSR, csr, xrd | xrs1);
|
||||
|
@ -1626,9 +1626,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION);
|
||||
}
|
||||
else {
|
||||
uint32_t res_34 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
uint32_t res_47 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint32_t xrd = res_34;
|
||||
uint32_t xrd = res_47;
|
||||
uint32_t xrs1 = *(X+rs1);
|
||||
if(rs1 != 0) {
|
||||
super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ xrs1);
|
||||
|
@ -1661,9 +1661,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION);
|
||||
}
|
||||
else {
|
||||
uint32_t res_35 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
uint32_t res_48 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint32_t xrd = res_35;
|
||||
uint32_t xrd = res_48;
|
||||
super::template write_mem<uint32_t>(traits::CSR, csr, (uint32_t)zimm);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
if(rd != 0) {
|
||||
|
@ -1693,9 +1693,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION);
|
||||
}
|
||||
else {
|
||||
uint32_t res_36 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
uint32_t res_49 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint32_t xrd = res_36;
|
||||
uint32_t xrd = res_49;
|
||||
if(zimm != 0) {
|
||||
super::template write_mem<uint32_t>(traits::CSR, csr, xrd | (uint32_t)zimm);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
|
@ -1727,9 +1727,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION);
|
||||
}
|
||||
else {
|
||||
uint32_t res_37 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
uint32_t res_50 = super::template read_mem<uint32_t>(traits::CSR, csr);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
uint32_t xrd = res_37;
|
||||
uint32_t xrd = res_50;
|
||||
if(zimm != 0) {
|
||||
super::template write_mem<uint32_t>(traits::CSR, csr, xrd & ~ ((uint32_t)zimm));
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
|
@ -2064,9 +2064,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
// execute instruction
|
||||
{
|
||||
uint32_t offs = (uint32_t)((uint64_t)(*(X+rs1 + 8) ) + (uint64_t)(uimm ));
|
||||
int32_t res_38 = super::template read_mem<int32_t>(traits::MEM, offs);
|
||||
int32_t res_51 = super::template read_mem<int32_t>(traits::MEM, offs);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
*(X+rd + 8) = (uint32_t)(int32_t)res_38;
|
||||
*(X+rd + 8) = (uint32_t)(int32_t)res_51;
|
||||
}
|
||||
break;
|
||||
}// @suppress("No break at end of case")
|
||||
|
@ -2486,9 +2486,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
|
|||
}
|
||||
else {
|
||||
uint32_t offs = (uint32_t)((uint64_t)(*(X+2) ) + (uint64_t)(uimm ));
|
||||
int32_t res_39 = super::template read_mem<int32_t>(traits::MEM, offs);
|
||||
int32_t res_52 = super::template read_mem<int32_t>(traits::MEM, offs);
|
||||
if(this->core.reg.trap_state>=0x80000000UL) throw memory_access_exception();
|
||||
*(X+rd) = (uint32_t)(int32_t)res_39;
|
||||
*(X+rd) = (uint32_t)(int32_t)res_52;
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
|
Loading…
Reference in New Issue