updates generated files
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@ -4809,4 +4809,4 @@ volatile std::array<bool, 2> dummy = {
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};
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}
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}
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// clang-format on
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// clang-format on
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@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (C) 20217-2024 MINRES Technologies GmbH
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* Copyright (C) 2017-2024 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -2534,7 +2534,8 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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// execute instruction
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{
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if(rs1 && rs1 < traits::RFS) {
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*NEXT_PC = *(X+(uint32_t)(rs1 ) % traits::RFS) & (uint32_t)(~ 1 );
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uint32_t addr_mask = (uint32_t)- 2;
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*NEXT_PC = *(X+(uint32_t)(rs1 ) % traits::RFS) & addr_mask;
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this->core.reg.last_branch = 1;
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}
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else {
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@ -2600,9 +2601,10 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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raise(0, traits::RV_CAUSE_ILLEGAL_INSTRUCTION);
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}
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else {
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uint32_t addr_mask = (uint32_t)- 2;
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uint32_t new_pc = *(X+rs1);
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*(X+1) = (uint32_t)((uint64_t)(*PC ) + (uint64_t)(2 ));
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*NEXT_PC = new_pc & (uint32_t)(~ 1 );
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*NEXT_PC = new_pc & addr_mask;
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this->core.reg.last_branch = 1;
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}
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}
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