DBT-RISE/DBT-RISE-TGC
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fixes missing rename

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This commit is contained in:
Eyck Jentzsch 2024-08-02 11:58:51 +02:00
parent edf456c59f
commit 6ddb8da07f
1 changed files with 4 additions and 4 deletions
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8
src/iss/arch/hwl.h
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@ -51,8 +51,8 @@ public:
virtual ~hwl() = default;
protected:
iss::status read_custom_csr_reg(unsigned addr, reg_t& val) override;
iss::status write_custom_csr_reg(unsigned addr, reg_t val) override;
iss::status read_custom_csr(unsigned addr, reg_t& val) override;
iss::status write_custom_csr(unsigned addr, reg_t val) override;
};
template <typename BASE>
@ -68,7 +68,7 @@ inline hwl<BASE>::hwl(feature_config cfg)
}
}
template <typename BASE> inline iss::status iss::arch::hwl<BASE>::read_custom_csr_reg(unsigned addr, reg_t& val) {
template <typename BASE> inline iss::status iss::arch::hwl<BASE>::read_custom_csr(unsigned addr, reg_t& val) {
switch(addr) {
case 0x800:
val = this->reg.lpstart0;
@ -92,7 +92,7 @@ template <typename BASE> inline iss::status iss::arch::hwl<BASE>::read_custom_cs
return iss::Ok;
}
template <typename BASE> inline iss::status iss::arch::hwl<BASE>::write_custom_csr_reg(unsigned addr, reg_t val) {
template <typename BASE> inline iss::status iss::arch::hwl<BASE>::write_custom_csr(unsigned addr, reg_t val) {
switch(addr) {
case 0x800:
this->reg.lpstart0 = val;