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39d2518fdd
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checkin: tgc5f builds and runs through
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2024-07-31 12:30:41 +02:00 |
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a365110054
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fix format
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2024-07-30 13:34:23 +02:00 |
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d2efb23ff7
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fixes cache behavior for fetches
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2024-07-25 19:33:50 +02:00 |
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e87b7d5fd0
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applies clang-format
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2024-07-24 14:48:50 +02:00 |
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5a2b96ef3e
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adds logging categories for ISS
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2024-07-24 12:30:07 +02:00 |
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375755999a
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integrates new tval changes
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2024-07-16 15:32:35 +02:00 |
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9996fd4833
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change cache line size to 64
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2024-07-11 14:03:58 +02:00 |
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149b3136d2
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updates generated files
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2024-07-10 12:55:36 +02:00 |
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b2cbf90d0b
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updates generated files
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2024-07-10 12:51:59 +02:00 |
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4cfb15c7cd
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Asmjit and interp working
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2024-07-10 12:51:31 +02:00 |
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63da7f8d57
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applies clang-format
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2024-07-09 13:57:11 +02:00 |
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fb4012fbd1
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moves likely annotation
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2024-07-09 13:52:10 +02:00 |
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24449f1c0f
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fixes some elf load issue
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2024-07-05 12:18:36 +02:00 |
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8460f4ab7f
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updates templates to re-enable interactive debugging of generator
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2024-06-21 10:46:11 +02:00 |
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3fd51cc68c
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fixes templates
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2024-06-14 19:54:33 +02:00 |
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551822916c
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applies clang-format
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2024-06-14 17:43:12 +02:00 |
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41051f8f34
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fixes tohost handling
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2024-05-31 10:43:38 +02:00 |
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gabriel
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a6c48ceaac
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2024-05-31 09:42:13 +02:00 |
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gabriel
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ed793471bb
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adding semhosting
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2024-05-31 07:27:47 +02:00 |
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001c6349f7
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removes tcc sim stop when writing to tohost
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2024-05-11 15:16:46 +02:00 |
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f0a004be9d
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adds information for debugging
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2024-05-09 13:42:16 +02:00 |
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fbcd389580
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fix log macro
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2024-04-15 13:03:47 +02:00 |
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b25b7848c6
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fix formatting
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2024-03-19 11:47:12 +01:00 |
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6c986d38d8
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2024-03-19 11:02:17 +01:00 |
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a1ebd83d2a
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adds riscv_hart_common and signature output
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2024-03-19 11:02:03 +01:00 |
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8aed551813
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Add a new LOG macro in SCC to avoid conflicts with other libraries.
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2024-03-14 09:43:08 +01:00 |
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119d4a8b43
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adds generation if IMEM space
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2024-02-21 07:08:24 +01:00 |
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fe2d5cb2f9
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adds semihosting to all backends
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2024-01-10 11:47:12 +01:00 |
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207f778ee6
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adds initial semihosting host capabilities
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2024-01-08 17:17:59 +01:00 |
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bc4ea30815
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apply clang-format 10 fixes
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2023-12-01 14:50:54 +01:00 |
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e921201f7b
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applies clang-format fixes
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2023-11-30 11:51:49 +01:00 |
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e6aa6e5842
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adds handling of variable number of clic interrupts
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2023-11-22 11:47:31 +01:00 |
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0eb1db0e7e
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adds functionality, adds working asmjit
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2023-11-20 11:45:52 +01:00 |
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e48597b2b7
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adds formatting fixes
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2023-11-05 17:19:43 +01:00 |
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759061b569
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applies clang-format changes
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2023-10-29 17:06:56 +01:00 |
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9180ad1f9c
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debugger memory accesses should never lead to traps
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2023-10-06 21:39:48 +02:00 |
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b7f023756e
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fixes constructor calls of derived riscv_hart classes
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2023-09-27 07:51:49 +02:00 |
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3fb8fe765a
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aligns riscv_hart_msu_vp with riscv_hart_m_p
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2023-09-26 20:17:26 +02:00 |
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8db0cc5d05
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removes clutter
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2023-09-23 10:34:58 +02:00 |
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212fb1c8ff
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adds tracing functionality
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2023-09-22 12:40:35 +02:00 |
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633c0d21a0
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2023-09-20 15:17:43 +02:00 |
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51f6fbe0dd
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applies newest CoreDSL changes
|
2023-09-20 15:12:03 +02:00 |
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de45d06878
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adds initial working version of llvm backend
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2023-09-19 16:26:07 +02:00 |
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b5d915f389
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fixes compile issues from merge
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2023-08-30 15:49:28 +02:00 |
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813b40409d
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Merge branch 'develop' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into develop
|
2023-08-30 10:05:42 +02:00 |
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c8a4a4c736
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renames core(s)
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2023-08-28 07:09:55 +02:00 |
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20e920338c
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removes v2p function
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2023-08-04 13:08:10 +02:00 |
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0b719a4b57
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fixes literal type
|
2023-07-10 20:39:02 +02:00 |
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250ea3c980
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extends factory to support SystemC core wrapper
|
2023-07-09 18:19:59 +02:00 |
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7b31b8ca8e
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adds updated generated files
|
2023-07-09 16:58:47 +02:00 |
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