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DBT-RISE-TGC
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fixes literal type

This commit is contained in:
Eyck Jentzsch 2023-07-10 20:39:02 +02:00
parent 57da07eb17
commit 0b719a4b57
3 changed files with 3 additions and 4 deletions
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2
gen_input/templates/CORENAME.h.gtl
View File

@ -55,7 +55,7 @@ def byteSize(int size){
return 128;
}
def getCString(def val){
return val.toString()
return val.toString()+'ULL'
}
%>
#ifndef _${coreDef.name.toUpperCase()}_H_

2
src/iss/arch/tgc_c.h
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@ -53,7 +53,7 @@ template <> struct traits<tgc_c> {
static constexpr std::array<const char*, 36> reg_aliases{
{"ZERO", "RA", "SP", "GP", "TP", "T0", "T1", "T2", "S0", "S1", "A0", "A1", "A2", "A3", "A4", "A5", "A6", "A7", "S2", "S3", "S4", "S5", "S6", "S7", "S8", "S9", "S10", "S11", "T3", "T4", "T5", "T6", "PC", "NEXT_PC", "PRIV", "DPC"}};
enum constants {MISA_VAL=1073746180, MARCHID_VAL=2147483651, XLEN=32, INSTR_ALIGNMENT=2, RFS=32, fence=0, fencei=1, fencevmal=2, fencevmau=3, CSR_SIZE=4096, MUL_LEN=64};
enum constants {MISA_VAL=1073746180ULL, MARCHID_VAL=2147483651ULL, XLEN=32ULL, INSTR_ALIGNMENT=2ULL, RFS=32ULL, fence=0ULL, fencei=1ULL, fencevmal=2ULL, fencevmau=3ULL, CSR_SIZE=4096ULL, MUL_LEN=64ULL};
constexpr static unsigned FP_REGS_SIZE = 0;

3
src/vm/interp/vm_tgc_c.cpp
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@ -2635,7 +2635,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
return pc;
}
}
} // namespace tgc_c
template <>
std::unique_ptr<vm_if> create<arch::tgc_c>(arch::tgc_c *core, unsigned short port, bool dump) {
@ -2667,4 +2667,3 @@ volatile std::array<bool, 2> dummy = {
};
}
}