Commit Graph

106 Commits

Author SHA1 Message Date
Eyck Jentzsch 4c3a7386b0 updates generated files 2023-10-22 08:51:08 +02:00
Eyck Jentzsch ee6a068b06 streamlines backends and reporting 2023-10-01 18:33:14 +02:00
Eyck-Alexander Jentzsch 417076f8e6 stops jit block creation in case of ECALL and EBREAK 2023-09-23 11:30:58 +02:00
Eyck-Alexander Jentzsch 70839bbbf2 changes templates for correct plugin callback in case of trap 2023-09-23 10:35:21 +02:00
Eyck-Alexander Jentzsch f74f98f361 improves readability 2023-09-22 12:40:12 +02:00
Eyck-Alexander Jentzsch 51f6fbe0dd applies newest CoreDSL changes 2023-09-20 15:12:03 +02:00
Eyck-Alexander Jentzsch de45d06878 adds initial working version of llvm backend 2023-09-19 16:26:07 +02:00
Eyck-Alexander Jentzsch b360fc2c75 Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop 2023-09-05 10:08:49 +02:00
Eyck-Alexander Jentzsch e21f8dc379 allows functions in interp and updates generated 2023-09-05 10:08:00 +02:00
Eyck Jentzsch 8ee3ac90f7 adapts name changes 2023-09-04 12:45:45 +02:00
Eyck Jentzsch b5d915f389 fixes compile issues from merge 2023-08-30 15:49:28 +02:00
Eyck Jentzsch c8a4a4c736 renames core(s) 2023-08-28 07:09:55 +02:00
Eyck Jentzsch 0b719a4b57 fixes literal type 2023-07-10 20:39:02 +02:00
Eyck Jentzsch b4b03f7850 fixes build system to handle TCC properly 2023-07-09 22:20:50 +02:00
Eyck Jentzsch e95f422aab cleans vm implementation up 2023-07-09 20:13:26 +02:00
Eyck Jentzsch 250ea3c980 extends factory to support SystemC core wrapper 2023-07-09 18:19:59 +02:00
Eyck-Alexander Jentzsch 7b31b8ca8e adds updated generated files 2023-07-09 16:58:47 +02:00
Eyck-Alexander Jentzsch 15cd36dcd4 adds fix for compressed instructions and reads 2023-06-05 17:57:38 +02:00
Eyck-Alexander Jentzsch 2281ec4144 corrects errors and adds new backend and 2023-06-05 15:18:27 +02:00
Eyck Jentzsch a123beb301 fixes duplicate variable declaration and templates 2023-05-27 10:20:49 +02:00
Eyck-Alexander Jentzsch 6ed7eafc5d adds inital version of tcc backend 2023-05-16 21:51:35 +02:00
Eyck Jentzsch 00b0f101ac adapts to changes of instrumentation interface in dbt-rise-core 2023-04-28 20:38:07 +02:00
Eyck Jentzsch a8a2782329 adds changes from latest CoreDSL description 2023-04-04 16:10:12 +02:00
Eyck Jentzsch c5465bf9e2 fixes according to fixed generator 2023-03-26 14:44:15 +02:00
Eyck Jentzsch ec55efd322 adds generator changed files 2023-02-17 06:36:34 +01:00
Eyck Jentzsch 8c3709f92a adds generator changed files 2023-02-17 06:29:27 +01:00
Eyck Jentzsch 65dca13b42 fixes WFI miss of interrupt 2023-01-14 17:40:21 +01:00
Eyck Jentzsch 8c701d55c1 adapt to latest changes in SCC 2022-12-05 09:15:48 +01:00
Eyck Jentzsch 7113683ee0 moves pending interrupt check before handling trap thus saving 1 cycle 2022-10-15 10:47:35 +02:00
Eyck Jentzsch fa7eda0889 fixes wrong check for exception 2022-08-31 11:45:53 +02:00
Eyck Jentzsch 00e02bf565 adds support for different branch types in tracing 2022-08-08 06:30:37 +02:00
Eyck Jentzsch 4876f18ba9 adds windows compatibility fixes 2022-07-18 11:43:42 +02:00
Eyck Jentzsch a53ee42e13 updates TGC_C according to CoreDSL description update 2022-07-12 22:34:22 +02:00
Eyck Jentzsch 12ccfc055a updates generate tgc_c definition 2022-07-11 22:58:10 +02:00
Eyck Jentzsch feaa49d367 removes decoder again as there is some issue 2022-06-20 00:39:11 +02:00
Eyck Jentzsch f096b15dbd factors decoder into separate component 2022-06-19 13:17:31 +02:00
Eyck Jentzsch 31fb51de95 update tgc_c generated code 2022-05-30 22:15:44 +02:00
Eyck Jentzsch 52ed8b81a6 fixed template to work with previous code generator 2022-05-30 14:08:02 +02:00
Eyck Jentzsch 0c542d42aa separate generated sources 2022-05-21 12:48:28 +02:00
Eyck Jentzsch df16378605 update template for changed code generator 2022-05-18 19:10:34 +02:00
Eyck Jentzsch e382217e04 update vm_tgc_c due reworked CoreDSL generator 2022-05-11 18:52:15 +02:00
Eyck Jentzsch 03bec27376 implement extended instrumentation interface 2022-04-26 17:14:33 +02:00
Eyck Jentzsch 9d9008a3a2 fix pointer mess 2022-04-26 15:35:17 +02:00
Eyck Jentzsch a92b84bef4 add code word access for ISS plugins 2022-04-25 14:18:19 +02:00
Eyck Jentzsch c054d75717 update to latest coredsl description 2022-04-10 18:55:44 +02:00
Eyck Jentzsch d91f5f9df4 fix compiler warning for reduced number of registers 2022-03-14 15:38:05 +01:00
Eyck Jentzsch 2e670c4d03 change interpreter structure 2022-03-06 15:11:38 +01:00
Eyck Jentzsch 521f40a3d6 refactored interpreter backend structure 2022-03-05 20:59:17 +01:00
Eyck Jentzsch 059bd0d371 rework cycle estimation 2022-02-01 19:03:45 +01:00
Eyck Jentzsch afe8905ac9 fix else-ambiguity in CoreDSL description 2022-01-31 20:30:46 +01:00