updates generated files
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@ -0,0 +1 @@
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/*.yaml
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@ -36,10 +36,11 @@
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#include <iss/iss.h>
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#include <iss/interp/vm_base.h>
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#include <util/logging.h>
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#include <sstream>
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#include <boost/coroutine2/all.hpp>
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#include <functional>
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#include <exception>
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#include <vector>
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#include <sstream>
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#ifndef FMT_HEADER_ONLY
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#define FMT_HEADER_ONLY
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@ -2522,8 +2523,7 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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// execute instruction
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{
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if(rs1 && rs1 < traits::RFS) {
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uint32_t addr_mask = (uint32_t)- 2;
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*NEXT_PC = *(X+rs1 % traits::RFS) & addr_mask;
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*NEXT_PC = *(X+rs1 % traits::RFS) & ~ 0x1;
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this->core.reg.last_branch = 1;
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}
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else {
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@ -2589,10 +2589,9 @@ typename vm_base<ARCH>::virt_addr_t vm_impl<ARCH>::execute_inst(finish_cond_e co
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raise(0, 2);
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}
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else {
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uint32_t addr_mask = (uint32_t)- 2;
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uint32_t new_pc = *(X+rs1);
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*(X+1) = (uint32_t)(*PC + 2);
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*NEXT_PC = new_pc & addr_mask;
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*NEXT_PC = new_pc & ~ 0x1;
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this->core.reg.last_branch = 1;
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}
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}
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@ -2699,13 +2698,13 @@ volatile std::array<bool, 2> dummy = {
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auto vm = new interp::tgc5c::vm_impl<arch::tgc5c>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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})/*,
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}),
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core_factory::instance().register_creator("tgc5c|mu_p|interp", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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auto* cpu = new iss::arch::riscv_hart_mu_p<iss::arch::tgc5c>();
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auto vm = new interp::tgc5c::vm_impl<arch::tgc5c>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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})*/
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})
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};
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}
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}
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@ -3303,12 +3303,12 @@ private:
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pc=pc+ 2;
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gen_set_pc(tu, pc, traits::NEXT_PC);
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tu.open_scope();
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if(rs1&&rs1<static_cast<uint32_t>(traits:: RFS)){ auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
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auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
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tu.load(rs1%static_cast<uint32_t>(traits:: RFS)+ traits::X0, 0),
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addr_mask),32);
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tu.store(traits::NEXT_PC, PC_val_v);
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tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
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if(rs1&&rs1<static_cast<uint32_t>(traits:: RFS)) {
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auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
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tu.load(rs1%static_cast<uint32_t>(traits:: RFS)+ traits::X0, 0),
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tu.constant(~ 0x1,8)),32);
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tu.store(traits::NEXT_PC, PC_val_v);
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tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
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}
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else{
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this->gen_raise_trap(tu, 0, 2);
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@ -3401,13 +3401,12 @@ private:
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this->gen_raise_trap(tu, 0, 2);
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}
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else{
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auto addr_mask = tu.assignment(tu.constant((uint32_t)- 2,32),32);
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auto new_pc = tu.assignment(tu.load(rs1+ traits::X0, 0),32);
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tu.store(1 + traits::X0,
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tu.constant((uint32_t)(PC+ 2),32));
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auto PC_val_v = tu.assignment("PC_val", tu.bitwise_and(
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new_pc,
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addr_mask),32);
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tu.constant(~ 0x1,8)),32);
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tu.store(traits::NEXT_PC, PC_val_v);
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tu.store(traits::LAST_BRANCH, tu.constant(2U, 2));
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}
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@ -3433,7 +3432,7 @@ private:
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gen_set_pc(tu, pc, traits::NEXT_PC);
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tu.open_scope();
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this->gen_raise_trap(tu, 0, 3);
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auto returnValue = std::make_tuple(TRAP);
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auto returnValue = std::make_tuple(CONT);
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tu.close_scope();
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gen_trap_check(tu);
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@ -3490,7 +3489,7 @@ private:
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gen_set_pc(tu, pc, traits::NEXT_PC);
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tu.open_scope();
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this->gen_raise_trap(tu, 0, 2);
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auto returnValue = std::make_tuple(TRAP);
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auto returnValue = std::make_tuple(CONT);
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tu.close_scope();
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gen_trap_check(tu);
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@ -3655,13 +3654,13 @@ volatile std::array<bool, 2> dummy = {
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auto vm = new tcc::tgc5c::vm_impl<arch::tgc5c>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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})/*,
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}),
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core_factory::instance().register_creator("tgc5c|mu_p|tcc", [](unsigned port, void*) -> std::tuple<cpu_ptr, vm_ptr>{
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auto* cpu = new iss::arch::riscv_hart_mu_p<iss::arch::tgc5c>();
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auto vm = new tcc::tgc5c::vm_impl<arch::tgc5c>(*cpu, false);
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if (port != 0) debugger::server<debugger::gdb_session>::run_server(vm, port);
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return {cpu_ptr{cpu}, vm_ptr{vm}};
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})*/
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})
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};
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}
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}
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