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1fb7e8fcea
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improves logging output
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2024-09-24 08:39:34 +02:00 |
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4c0d1c75aa
|
adds addr formatting to logging
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2024-09-23 12:21:43 +02:00 |
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2f3abf2f76
|
adds namespaces for ELFIO
|
2024-09-23 11:55:18 +02:00 |
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62768bf81e
|
applies clang format
|
2024-09-23 10:05:33 +02:00 |
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a8f56b6e27
|
removes code dupication by unifying elf file read
|
2024-09-23 09:28:27 +02:00 |
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ec1b820c18
|
fixes target xml generation
|
2024-08-17 19:36:53 +02:00 |
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64329cf0f6
|
fixes use of icount vs. cycle
|
2024-08-17 19:36:40 +02:00 |
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bb4e2766d1
|
applies clang-format
|
2024-08-17 16:12:57 +02:00 |
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0996d15bd4
|
removes debug code
|
2024-08-17 12:48:48 +02:00 |
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6305efa7c2
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implements proper target XML generation incl. CSRs
|
2024-08-17 12:40:40 +02:00 |
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de79adc50d
|
updates debugger hook to stop before fetching instructions
this relates to https://github.com/Minres/DBT-RISE-RISCV/issues/8 :
Debugger loses control when trap vector fetch fails
and https://github.com/Minres/DBT-RISE-RISCV/issues/7 : Two debugger
single-steps are required at reset vector
|
2024-08-17 12:39:54 +02:00 |
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b3cc9d2346
|
makes core_complex a template
|
2024-08-04 18:47:32 +02:00 |
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21f8eab432
|
adds regenerated tgc5c
|
2024-08-02 19:18:28 +02:00 |
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6ddb8da07f
|
fixes missing rename
|
2024-08-02 11:58:51 +02:00 |
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edf456c59f
|
fixes missing braces
|
2024-08-02 10:33:15 +02:00 |
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42efced1eb
|
fixes FCSR behavior if no floating point is implemented
|
2024-08-02 08:59:22 +02:00 |
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39d2518fdd
|
checkin: tgc5f builds and runs through
|
2024-07-31 12:30:41 +02:00 |
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a365110054
|
fix format
|
2024-07-30 13:34:23 +02:00 |
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d2efb23ff7
|
fixes cache behavior for fetches
|
2024-07-25 19:33:50 +02:00 |
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e87b7d5fd0
|
applies clang-format
|
2024-07-24 14:48:50 +02:00 |
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5a2b96ef3e
|
adds logging categories for ISS
|
2024-07-24 12:30:07 +02:00 |
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375755999a
|
integrates new tval changes
|
2024-07-16 15:32:35 +02:00 |
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9996fd4833
|
change cache line size to 64
|
2024-07-11 14:03:58 +02:00 |
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149b3136d2
|
updates generated files
|
2024-07-10 12:55:36 +02:00 |
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b2cbf90d0b
|
updates generated files
|
2024-07-10 12:51:59 +02:00 |
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4cfb15c7cd
|
Asmjit and interp working
|
2024-07-10 12:51:31 +02:00 |
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63da7f8d57
|
applies clang-format
|
2024-07-09 13:57:11 +02:00 |
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fb4012fbd1
|
moves likely annotation
|
2024-07-09 13:52:10 +02:00 |
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24449f1c0f
|
fixes some elf load issue
|
2024-07-05 12:18:36 +02:00 |
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8460f4ab7f
|
updates templates to re-enable interactive debugging of generator
|
2024-06-21 10:46:11 +02:00 |
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3fd51cc68c
|
fixes templates
|
2024-06-14 19:54:33 +02:00 |
|
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551822916c
|
applies clang-format
|
2024-06-14 17:43:12 +02:00 |
|
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41051f8f34
|
fixes tohost handling
|
2024-05-31 10:43:38 +02:00 |
|
gabriel
|
a6c48ceaac
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2024-05-31 09:42:13 +02:00 |
|
gabriel
|
ed793471bb
|
adding semhosting
|
2024-05-31 07:27:47 +02:00 |
|
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001c6349f7
|
removes tcc sim stop when writing to tohost
|
2024-05-11 15:16:46 +02:00 |
|
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f0a004be9d
|
adds information for debugging
|
2024-05-09 13:42:16 +02:00 |
|
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|
fbcd389580
|
fix log macro
|
2024-04-15 13:03:47 +02:00 |
|
|
|
b25b7848c6
|
fix formatting
|
2024-03-19 11:47:12 +01:00 |
|
|
|
6c986d38d8
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2024-03-19 11:02:17 +01:00 |
|
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a1ebd83d2a
|
adds riscv_hart_common and signature output
|
2024-03-19 11:02:03 +01:00 |
|
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|
8aed551813
|
Add a new LOG macro in SCC to avoid conflicts with other libraries.
|
2024-03-14 09:43:08 +01:00 |
|
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119d4a8b43
|
adds generation if IMEM space
|
2024-02-21 07:08:24 +01:00 |
|
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fe2d5cb2f9
|
adds semihosting to all backends
|
2024-01-10 11:47:12 +01:00 |
|
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|
3ff59ba45d
|
small refactor, adds baisc functionality
|
2024-01-10 10:15:05 +01:00 |
|
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|
075e04249a
|
adds semihosting skeleton
|
2024-01-09 12:50:41 +01:00 |
|
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207f778ee6
|
adds initial semihosting host capabilities
|
2024-01-08 17:17:59 +01:00 |
|
|
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bc4ea30815
|
apply clang-format 10 fixes
|
2023-12-01 14:50:54 +01:00 |
|
|
|
e921201f7b
|
applies clang-format fixes
|
2023-11-30 11:51:49 +01:00 |
|
|
|
e6aa6e5842
|
adds handling of variable number of clic interrupts
|
2023-11-22 11:47:31 +01:00 |
|
