 Eyck Jentzsch
|
09db0cd35d
|
fixes LLVM backend registration for SystemC
|
2023-10-26 06:50:54 +02:00 |
|
Eyck Jentzsch
|
b7478965ab
|
adds asmjit backend registration for SystemC
|
2023-10-23 10:18:25 +02:00 |
 Eyck-Alexander Jentzsch
|
ffe730219d
|
merge commit
|
2023-10-22 15:13:25 +02:00 |
|
Eyck-Alexander Jentzsch
|
60c926c921
|
adds asmjit
|
2023-10-22 15:11:20 +02:00 |
|
Eyck Jentzsch
|
3a86f4f9de
|
does some cleanup of generated files
|
2023-10-21 17:19:24 +02:00 |
|
Eyck Jentzsch
|
b9b165465d
|
adds some template updates
|
2023-09-30 22:17:18 +02:00 |
|
Eyck Jentzsch
|
b97853ff5a
|
update plugins to read YAML file
|
2023-09-30 22:10:24 +02:00 |
|
Eyck-Alexander Jentzsch
|
417076f8e6
|
stops jit block creation in case of ECALL and EBREAK
|
2023-09-23 11:30:58 +02:00 |
|
Eyck-Alexander Jentzsch
|
70839bbbf2
|
changes templates for correct plugin callback in case of trap
|
2023-09-23 10:35:21 +02:00 |
|
Eyck-Alexander Jentzsch
|
8db0cc5d05
|
removes clutter
|
2023-09-23 10:34:58 +02:00 |
|
Eyck-Alexander Jentzsch
|
633c0d21a0
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2023-09-20 15:17:43 +02:00 |
|
Eyck-Alexander Jentzsch
|
51f6fbe0dd
|
applies newest CoreDSL changes
|
2023-09-20 15:12:03 +02:00 |
|
Eyck-Alexander Jentzsch
|
de45d06878
|
adds initial working version of llvm backend
|
2023-09-19 16:26:07 +02:00 |
|
Eyck-Alexander Jentzsch
|
e21f8dc379
|
allows functions in interp and updates generated
|
2023-09-05 10:08:00 +02:00 |
|
Eyck Jentzsch
|
813b40409d
|
Merge branch 'develop' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into develop
|
2023-08-30 10:05:42 +02:00 |
|
Eyck Jentzsch
|
c8a4a4c736
|
renames core(s)
|
2023-08-28 07:09:55 +02:00 |
|
Eyck Jentzsch
|
18e08cfc50
|
fixes missing template updates
|
2023-08-08 06:23:38 +02:00 |
|
Eyck Jentzsch
|
20e920338c
|
removes v2p function
|
2023-08-04 13:08:10 +02:00 |
|
Eyck Jentzsch
|
e151416f58
|
fixes systemc factory registration
|
2023-07-31 12:55:09 +02:00 |
|
Eyck Jentzsch
|
e68f9c573f
|
Merge branch 'develop' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into develop
|
2023-07-30 09:14:58 +02:00 |
|
Eyck Jentzsch
|
f38cc7d8b9
|
updates LLVM build
|
2023-07-29 17:55:37 +02:00 |
|
Eyck-Alexander Jentzsch
|
7af7e040da
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2023-07-29 11:47:25 +02:00 |
|
Eyck-Alexander Jentzsch
|
6e52af168b
|
adds faster decoding to tcc and cleans up others
|
2023-07-29 11:42:46 +02:00 |
|
Eyck-Alexander Jentzsch
|
bd0d15f3a2
|
updates template for faster instruction decoding
|
2023-07-23 08:10:57 +02:00 |
|
Eyck Jentzsch
|
720236ec3f
|
add generated core registration
|
2023-07-14 12:51:51 +02:00 |
|
Eyck Jentzsch
|
957145ca84
|
add SystemC ISS factory
|
2023-07-14 11:11:03 +02:00 |
|
Eyck Jentzsch
|
0b719a4b57
|
fixes literal type
|
2023-07-10 20:39:02 +02:00 |
|
Eyck Jentzsch
|
b4b03f7850
|
fixes build system to handle TCC properly
|
2023-07-09 22:20:50 +02:00 |
|
Eyck Jentzsch
|
e95f422aab
|
cleans vm implementation up
|
2023-07-09 20:13:26 +02:00 |
|
Eyck Jentzsch
|
250ea3c980
|
extends factory to support SystemC core wrapper
|
2023-07-09 18:19:59 +02:00 |
|
Eyck-Alexander Jentzsch
|
21d3250e1a
|
changes templates
|
2023-07-09 16:53:59 +02:00 |
|
Eyck-Alexander Jentzsch
|
87b4082633
|
Merge branch 'tmp' into develop
|
2023-07-03 14:22:50 +02:00 |
|
Eyck Jentzsch
|
99a9970ddd
|
fixes sysc compile issues
|
2023-06-12 09:58:24 +02:00 |
|
Eyck-Alexander Jentzsch
|
15cd36dcd4
|
adds fix for compressed instructions and reads
|
2023-06-05 17:57:38 +02:00 |
|
Eyck Jentzsch
|
a123beb301
|
fixes duplicate variable declaration and templates
|
2023-05-27 10:20:49 +02:00 |
|
Eyck-Alexander Jentzsch
|
ce5b2e60b9
|
amends template to fix branching instructions
|
2023-05-22 17:00:36 +02:00 |
|
Eyck-Alexander Jentzsch
|
6ed7eafc5d
|
adds inital version of tcc backend
|
2023-05-16 21:51:35 +02:00 |
|
Eyck-Alexander Jentzsch
|
ee2ded931d
|
adds remaining register offsets
|
2023-05-14 17:16:42 +02:00 |
|
Eyck Jentzsch
|
95ba5c901a
|
re-introduces last_branch register
|
2023-05-14 17:00:37 +02:00 |
|
Eyck Jentzsch
|
00b0f101ac
|
adapts to changes of instrumentation interface in dbt-rise-core
|
2023-04-28 20:38:07 +02:00 |
|
Eyck Jentzsch
|
d881cb6e63
|
fix data width of generated code
|
2023-03-26 12:12:34 +02:00 |
|
Eyck Jentzsch
|
207dbf1071
|
fixes out of range access for register alias names
|
2023-02-17 06:28:30 +01:00 |
|
Eyck Jentzsch
|
65dca13b42
|
fixes WFI miss of interrupt
|
2023-01-14 17:40:21 +01:00 |
|
Eyck Jentzsch
|
7113683ee0
|
moves pending interrupt check before handling trap thus saving 1 cycle
|
2022-10-15 10:47:35 +02:00 |
|
Eyck Jentzsch
|
00e02bf565
|
adds support for different branch types in tracing
|
2022-08-08 06:30:37 +02:00 |
|
Eyck Jentzsch
|
0833198d34
|
aads missing windows compat firx to template
|
2022-07-23 14:36:23 +02:00 |
|
Eyck Jentzsch
|
4876f18ba9
|
adds windows compatibility fixes
|
2022-07-18 11:43:42 +02:00 |
|
Eyck Jentzsch
|
feaa49d367
|
removes decoder again as there is some issue
|
2022-06-20 00:39:11 +02:00 |
|
Eyck Jentzsch
|
18f33b4a68
|
fixes ordering of instructions for decoding
|
2022-06-19 16:52:29 +02:00 |
|
Eyck Jentzsch
|
f096b15dbd
|
factors decoder into separate component
|
2022-06-19 13:17:31 +02:00 |