Commit Graph

456 Commits

Author SHA1 Message Date
ad8dc09bee Merge branch 'feature/reduced_output' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into feature/reduced_output 2022-03-28 11:15:45 +02:00
49be143588 make features configurable 2022-03-27 17:54:08 +02:00
0aea1d0177 remove mcounteren in M-mode only wrapper 2022-03-27 17:21:46 +02:00
6ea7721961 add TCM 2022-03-27 15:38:18 +02:00
b0cb997009 add TGC_X with DMR 2022-03-26 10:48:21 +01:00
9dfca612b7 add hardware loop CSR access 2022-03-25 11:33:44 +01:00
30ae743361 add pctrace plugin to iss 2022-03-20 17:41:54 +01:00
d91f5f9df4 fix compiler warning for reduced number of registers 2022-03-14 15:38:05 +01:00
5ec457c76b build pctrace plugin only if RapidJSON target is availble 2022-03-08 11:23:07 +01:00
2e670c4d03 change interpreter structure 2022-03-06 15:11:38 +01:00
3d32c33333 update gitignore 2022-03-05 20:59:45 +01:00
521f40a3d6 refactored interpreter backend structure 2022-03-05 20:59:17 +01:00
2bba5645c3 adds functionality to reduce the output 2022-02-16 10:13:29 +01:00
bf0a5a80de adds functionality to reduce the output 2022-02-16 10:12:45 +01:00
b37ef973de clean up 2022-02-14 20:36:12 +01:00
4c363f4073 adds additional functionality by fetching delay information 2022-02-11 11:28:00 +01:00
b8fa5fbbda adapt to extended instrumentation interface 2022-02-09 21:01:17 +01:00
ac86f14a54 add tgc_c_xrb_nn to tgc-sim 2022-02-02 21:33:42 +01:00
68b5697c8f Fix cycles JSON template 2022-02-01 21:48:56 +01:00
09b0f0d0c8 fix cycle estimation plugin 2022-02-01 21:14:50 +01:00
98b418ff43 fix JSON reading 2022-02-01 19:28:11 +01:00
059bd0d371 rework cycle estimation 2022-02-01 19:03:45 +01:00
ef2a4df925 simplify spawn block handling 2022-01-31 23:40:31 +01:00
7578906310 adds coverage plugin 2022-01-31 21:38:18 +01:00
afe8905ac9 fix else-ambiguity in CoreDSL description 2022-01-31 20:30:46 +01:00
ecc6091d1e cleans up source code to remove clang compiler warnings 2022-01-19 08:01:15 +01:00
3563ba80d0 add spawn blocks 2022-01-12 07:21:16 +01:00
09955be90f update gitignore 2021-12-05 08:45:49 +01:00
dd4c19a15c add option to configure number of irq 2021-12-01 12:56:36 +01:00
07d5af1dde fix stand-alone ISS compilation to include all generated cores 2021-11-26 17:56:40 +01:00
6f8595759e make tgc-sim include all available ISS 2021-11-25 20:00:27 +01:00
86da31033c correct size usage in pmp addr checks 2021-11-22 15:15:47 +01:00
974d103381 fix pmpcfg register write 2021-11-22 10:49:29 +01:00
309758b994 fix clic_cfg access scheme 2021-11-17 07:59:02 +01:00
965929d1eb remove descriptions 2021-11-15 09:30:16 +01:00
d47375a70e fix ebreak CSR update 2021-11-13 12:47:23 +01:00
d31b4ef5a8 fix MISA val 2021-11-11 12:58:57 +01:00
7452c5df43 add TGC_D_XRB_NN definition 2021-11-11 12:16:35 +01:00
43d7b99905 revert pmp check implementation 2021-11-11 09:58:19 +01:00
f90c48e881 adapt to changed define names 2021-11-11 08:33:35 +01:00
2d7973520b fix mip handling 2021-11-09 19:47:34 +01:00
fd98ad95f6 rework PMP check and fix MISA for TGC_D 2021-11-09 15:55:22 +01:00
bfa8166223 fix wrong template class name 2021-11-08 10:44:33 +01:00
c42e336509 fix proper debug mode handling (#267 & #268) 2021-11-07 17:48:44 +01:00
49d09a05d7 fix access rights to debug CSR register (#268) 2021-11-07 16:45:10 +01:00
459794b863 add proper handling of store access fault (hart_mu_p) 2021-11-06 13:29:11 +01:00
039746112b fix exception behavior 2021-11-02 15:10:20 +01:00
ac6d7ea5d4 add debug feature to platform 2021-11-02 11:13:29 +01:00
a89f00da19 fix plugins parameter utilization 2021-11-02 11:03:17 +01:00
ff04ee7807 get rid of the Boost::thread linking 2021-11-02 10:24:34 +01:00