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11a30caae8
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integrates generator changes to canPrecompute
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2024-07-17 15:14:13 +02:00 |
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ac1a26a10c
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integrates new tval changes into llvm
|
2024-07-17 14:17:02 +02:00 |
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7a199e122d
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integrates new tval changes into asmjit
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2024-07-17 09:42:12 +02:00 |
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d8c3d2e19c
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integrates new tval changes into tcc
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2024-07-16 17:35:23 +02:00 |
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375755999a
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integrates new tval changes
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2024-07-16 15:32:35 +02:00 |
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9996fd4833
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change cache line size to 64
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2024-07-11 14:03:58 +02:00 |
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149b3136d2
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updates generated files
|
2024-07-10 12:55:36 +02:00 |
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ac8f8b0539
|
updates vms with fixed Zc in tgc5c.core_desc
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2024-07-10 12:51:59 +02:00 |
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b2cbf90d0b
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updates generated files
|
2024-07-10 12:51:59 +02:00 |
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373145478e
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updats file because of generator changes
|
2024-07-10 12:51:59 +02:00 |
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55b0cea94f
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changes vm_base util API
|
2024-07-10 12:51:59 +02:00 |
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5b17599aa2
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allows usage of std::variants
|
2024-07-10 12:51:59 +02:00 |
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4cfb15c7cd
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Asmjit and interp working
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2024-07-10 12:51:31 +02:00 |
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63da7f8d57
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applies clang-format
|
2024-07-09 13:57:11 +02:00 |
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fb4012fbd1
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moves likely annotation
|
2024-07-09 13:52:10 +02:00 |
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24449f1c0f
|
fixes some elf load issue
|
2024-07-05 12:18:36 +02:00 |
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fd303c8343
|
fixes asmjit deprecation warning
|
2024-07-05 07:51:37 +02:00 |
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346b177a87
|
extends finishing conditions
|
2024-07-05 05:52:29 +02:00 |
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d4ec131fa7
|
change COUNT_LIMIT to ICOUNT_LIMIT
|
2024-07-04 10:46:24 +02:00 |
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48370a4555
|
asmjit passes backend with new CoreDSL
|
2024-06-22 09:28:26 +02:00 |
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8460f4ab7f
|
updates templates to re-enable interactive debugging of generator
|
2024-06-21 10:46:11 +02:00 |
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3fd51cc68c
|
fixes templates
|
2024-06-14 19:54:33 +02:00 |
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551822916c
|
applies clang-format
|
2024-06-14 17:43:12 +02:00 |
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e2da306eee
|
fixes semihosting cb registration
|
2024-05-31 10:45:28 +02:00 |
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41051f8f34
|
fixes tohost handling
|
2024-05-31 10:43:38 +02:00 |
|
gabriel
|
a6c48ceaac
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2024-05-31 09:42:13 +02:00 |
|
gabriel
|
ed793471bb
|
adding semhosting
|
2024-05-31 07:27:47 +02:00 |
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|
58fb815f32
|
fixes gen_raise in tcc
|
2024-05-20 10:34:23 +02:00 |
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3cc8bd0854
|
adds reformat bc of verilog literals
|
2024-05-18 21:01:05 +02:00 |
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a27850f841
|
adds verilog literal and illegal_instr to asmjit
|
2024-05-18 21:00:21 +02:00 |
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|
fb330cddea
|
llvm passes act
|
2024-05-18 19:33:57 +02:00 |
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|
b76c5bf0d6
|
adds flush to fence_i
|
2024-05-11 15:25:49 +02:00 |
|
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|
001c6349f7
|
removes tcc sim stop when writing to tohost
|
2024-05-11 15:16:46 +02:00 |
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|
|
ee6a11dae6
|
fixes typo
|
2024-05-09 20:54:30 +02:00 |
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|
2e27b025cc
|
improves dump-ir comments
|
2024-05-09 13:47:36 +02:00 |
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f0a004be9d
|
adds information for debugging
|
2024-05-09 13:42:16 +02:00 |
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|
3422c7cd5c
|
optimizes writebacks
|
2024-05-08 15:18:38 +02:00 |
|
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|
ad79a28705
|
wip checkin
|
2024-04-30 19:21:27 +02:00 |
|
|
|
9fdbc3ff38
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2024-04-26 17:07:00 +02:00 |
|
|
|
602bc6e06a
|
checking: working
|
2024-04-26 17:06:26 +02:00 |
|
|
|
6cb76fc256
|
updates tgc5c according to latest CoreDSL
|
2024-04-16 13:09:14 +02:00 |
|
|
|
fbcd389580
|
fix log macro
|
2024-04-15 13:03:47 +02:00 |
|
|
|
b25b7848c6
|
fix formatting
|
2024-03-19 11:47:12 +01:00 |
|
|
|
6c986d38d8
|
Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
|
2024-03-19 11:02:17 +01:00 |
|
|
|
a1ebd83d2a
|
adds riscv_hart_common and signature output
|
2024-03-19 11:02:03 +01:00 |
|
|
|
8aed551813
|
Add a new LOG macro in SCC to avoid conflicts with other libraries.
|
2024-03-14 09:43:08 +01:00 |
|
|
|
1e6a0086e9
|
adds disass functionality
|
2024-03-07 13:58:08 +01:00 |
|
|
|
119d4a8b43
|
adds generation if IMEM space
|
2024-02-21 07:08:24 +01:00 |
|
|
|
9841b16122
|
fixes clang-format failures
|
2024-01-12 11:49:11 +01:00 |
|
|
|
fe2d5cb2f9
|
adds semihosting to all backends
|
2024-01-10 11:47:12 +01:00 |
|
