DBT-RISE/DBT-RISE-TGC
11
0
Fork 0
Code Issues 1 Pull Requests 1 Projects Releases Wiki Activity

fixes typo

Browse Source
This commit is contained in:
Eyck-Alexander Jentzsch 2024-05-09 20:54:30 +02:00
parent 2e27b025cc
commit ee6a11dae6
2 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
gen_input/templates/asmjit/CORENAME.cpp.gtl
View File

@ -324,7 +324,7 @@ void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
cc.ret(jh.next_pc);
}
template <typename ARCH>
inline void vm_impl<ARCH>:: gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) {
inline void vm_impl<ARCH>::gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) {
auto& cc = jh.cc;
cc.comment("//gen_raise");
auto tmp1 = get_reg_for(jh, traits::TRAP_STATE);

4
src/vm/asmjit/vm_tgc5c.cpp
View File

@ -80,7 +80,7 @@ public:
protected:
using super::get_ptr_for;
using super::get_reg;
using super::get_reg;
using super::get_reg_for;
using super::load_reg_from_mem;
using super::write_reg_to_mem;
@ -4757,7 +4757,7 @@ void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
cc.ret(jh.next_pc);
}
template <typename ARCH>
inline void vm_impl<ARCH>:: gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) {
inline void vm_impl<ARCH>::gen_raise(jit_holder& jh, uint16_t trap_id, uint16_t cause) {
auto& cc = jh.cc;
cc.comment("//gen_raise");
auto tmp1 = get_reg_for(jh, traits::TRAP_STATE);