asmjit passes backend with new CoreDSL
This commit is contained in:
parent
36b076774e
commit
48370a4555
@ -1,5 +1,5 @@
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/*******************************************************************************
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* Copyright (C) 2017, 2023 MINRES Technologies GmbH
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* Copyright (C) 2017-2024 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@ -339,7 +339,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -385,7 +385,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -431,7 +431,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(imm%static_cast<uint32_t>(traits::INSTR_ALIGNMENT)){
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@ -486,7 +486,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto addr_mask = (uint32_t)- 2;
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@ -554,7 +554,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto label_merge = cc.newLabel();
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@ -612,7 +612,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto label_merge = cc.newLabel();
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@ -670,7 +670,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto label_merge = cc.newLabel();
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@ -730,7 +730,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto label_merge = cc.newLabel();
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@ -790,7 +790,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto label_merge = cc.newLabel();
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@ -848,7 +848,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto label_merge = cc.newLabel();
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@ -906,7 +906,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address = gen_ext(jh,
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@ -959,7 +959,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address = gen_ext(jh,
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@ -1012,7 +1012,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address = gen_ext(jh,
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@ -1065,7 +1065,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address = gen_ext(jh,
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@ -1117,7 +1117,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto load_address = gen_ext(jh,
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@ -1169,7 +1169,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto store_address = gen_ext(jh,
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@ -1217,7 +1217,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto store_address = gen_ext(jh,
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@ -1265,7 +1265,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rs2>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto store_address = gen_ext(jh,
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@ -1313,7 +1313,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1362,7 +1362,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1424,7 +1424,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1485,7 +1485,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1533,7 +1533,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1581,7 +1581,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1629,7 +1629,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1677,7 +1677,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1725,7 +1725,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1733,7 +1733,7 @@ private:
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gen_ext(jh,
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(gen_operation(jh, sar, gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), shamt)
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), 32, true));
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), 32, false));
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}
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}
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auto returnValue = CONT;
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@ -1775,7 +1775,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1824,7 +1824,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1873,7 +1873,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1922,7 +1922,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -1985,7 +1985,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -2046,7 +2046,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -2094,7 +2094,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -2143,7 +2143,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -2194,7 +2194,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -2242,7 +2242,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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if(rd!=0){
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@ -2471,7 +2471,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto xrs1 = load_reg_from_mem(jh, traits::X0 + rs1);
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@ -2524,7 +2524,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
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if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
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gen_raise(jh, 0, 2);
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gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
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}
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else{
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auto xrd = gen_read_mem(jh, traits::CSR, csr, 4);
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@ -2577,7 +2577,7 @@ private:
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cc.comment("//behavior:");
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/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = gen_read_mem(jh, traits::CSR, csr, 4);
|
||||
@ -2630,7 +2630,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = gen_read_mem(jh, traits::CSR, csr, 4);
|
||||
@ -2679,7 +2679,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = gen_read_mem(jh, traits::CSR, csr, 4);
|
||||
@ -2731,7 +2731,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto xrd = gen_read_mem(jh, traits::CSR, csr, 4);
|
||||
@ -2822,16 +2822,13 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = gen_ext(jh,
|
||||
(gen_operation(jh, imul, gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true))
|
||||
), 64, true);
|
||||
auto res = gen_operation(jh, imul, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true))
|
||||
;
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
@ -2877,16 +2874,13 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = gen_ext(jh,
|
||||
(gen_operation(jh, imul, gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true))
|
||||
), 64, true);
|
||||
auto res = gen_operation(jh, imul, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true))
|
||||
;
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
@ -2933,15 +2927,12 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = gen_ext(jh,
|
||||
(gen_operation(jh, imul, gen_ext(jh,
|
||||
gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 64, false))
|
||||
), 64, true);
|
||||
auto res = gen_operation(jh, imul, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
;
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
@ -2988,14 +2979,12 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto res = gen_ext(jh,
|
||||
(gen_operation(jh, mul, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 64, false), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 64, false))
|
||||
), 64, false);
|
||||
auto res = gen_operation(jh, mul,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1),
|
||||
load_reg_from_mem(jh, traits::X0 + rs2));
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
@ -3042,13 +3031,13 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto dividend = gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, false);
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true);
|
||||
auto divisor = gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, false);
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true);
|
||||
if(rd!=0){
|
||||
auto label_merge = cc.newLabel();
|
||||
cc.cmp(gen_operation(jh, ne, divisor, 0)
|
||||
@ -3126,7 +3115,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto label_merge = cc.newLabel();
|
||||
@ -3137,9 +3126,8 @@ private:
|
||||
{
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, div, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
), 32, false));
|
||||
gen_operation(jh, div, load_reg_from_mem(jh, traits::X0 + rs1), load_reg_from_mem(jh, traits::X0 + rs2))
|
||||
);
|
||||
}
|
||||
}
|
||||
cc.jmp(label_merge);
|
||||
@ -3191,7 +3179,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto label_merge = cc.newLabel();
|
||||
@ -3223,9 +3211,9 @@ private:
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
gen_ext(jh,
|
||||
(gen_operation(jh, srem, gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, false), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, false))
|
||||
), 32, true));
|
||||
load_reg_from_mem(jh, traits::X0 + rs1), 32, true), gen_ext(jh,
|
||||
load_reg_from_mem(jh, traits::X0 + rs2), 32, true))
|
||||
), 32, false));
|
||||
}
|
||||
}
|
||||
cc.bind(label_merge);
|
||||
@ -3279,7 +3267,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rs1>=static_cast<uint32_t>(traits::RFS)||rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto label_merge = cc.newLabel();
|
||||
@ -3348,7 +3336,7 @@ private:
|
||||
), 32, false));
|
||||
}
|
||||
else{
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
||||
@ -3476,7 +3464,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rs1>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rs1!=0){
|
||||
@ -3600,7 +3588,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0){
|
||||
@ -3646,7 +3634,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(imm==0||rd>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
if(rd!=0){
|
||||
cc.mov(get_ptr_for(jh, traits::X0+ rd),
|
||||
@ -3695,7 +3683,7 @@ private:
|
||||
), 32, true));
|
||||
}
|
||||
else{
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
auto returnValue = CONT;
|
||||
|
||||
@ -3732,7 +3720,7 @@ private:
|
||||
gen_instr_prologue(jh);
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
@ -4199,7 +4187,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rs1>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rs1!=0){
|
||||
@ -4246,7 +4234,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)||rd==0){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto offs = gen_ext(jh,
|
||||
@ -4295,7 +4283,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0){
|
||||
@ -4421,7 +4409,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rd>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
if(rd!=0){
|
||||
@ -4468,7 +4456,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rs1>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto new_pc = load_reg_from_mem(jh, traits::X0 + rs1);
|
||||
@ -4552,7 +4540,7 @@ private:
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
if(rs2>=static_cast<uint32_t>(traits::RFS)){
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
}
|
||||
else{
|
||||
auto offs = gen_ext(jh,
|
||||
@ -4595,7 +4583,7 @@ private:
|
||||
gen_instr_prologue(jh);
|
||||
cc.comment("//behavior:");
|
||||
/*generate behavior*/
|
||||
gen_raise(jh, 0, 2);
|
||||
gen_raise(jh, 0, static_cast<int32_t>(traits::RV_CAUSE_ILLEGAL_INSTRUCTION));
|
||||
auto returnValue = CONT;
|
||||
|
||||
gen_instr_epilogue(jh);
|
||||
@ -4616,7 +4604,8 @@ private:
|
||||
gen_instr_epilogue(jh);
|
||||
this->gen_sync(jh, POST_SYNC, instr_descr.size());
|
||||
return BRANCH;
|
||||
}
|
||||
}
|
||||
|
||||
//decoding functionality
|
||||
|
||||
void populate_decoding_tree(decoding_tree_node* root){
|
||||
|
||||
Loading…
Reference in New Issue
Block a user