optimizes writebacks
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ad79a28705
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3422c7cd5c
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@ -284,11 +284,6 @@ void vm_impl<ARCH>::gen_instr_epilogue(jit_holder& jh) {
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cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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cc.cmp(current_trap_state, 0);
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cc.jne(jh.trap_entry);
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// TODO: Does not need to be done for every instruction, only when needed (by plugin)
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cc.comment("//write back regs to mem");
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write_reg_to_mem(jh, jh.pc, traits::PC);
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write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC);
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}
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template <typename ARCH>
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void vm_impl<ARCH>::gen_block_prologue(jit_holder& jh){
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@ -304,10 +299,7 @@ void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
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cc.bind(jh.trap_entry);
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cc.comment("//Prepare for enter_trap;");
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// Make sure cached values are written back
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cc.comment("//write back regs to mem");
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write_reg_to_mem(jh, jh.pc, traits::PC);
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write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC);
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this->write_back(jh);
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this->gen_sync(jh, POST_SYNC, -1);
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x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE);
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@ -2826,12 +2826,12 @@ private:
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}
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else{
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auto res = gen_ext(jh,
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(gen_operation(jh, imul, gen_ext(jh,
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gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true), gen_ext(jh,
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gen_ext(jh,
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load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true))
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), 64, true);
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(gen_operation(jh, imul,
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gen_ext(jh,
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gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs1), 32, true), 64, true),
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gen_ext(jh,
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gen_ext(jh, load_reg_from_mem(jh, traits::X0 + rs2), 32, true), 64, true))
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), 64, true);
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if(rd!=0){
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cc.mov(get_ptr_for(jh, traits::X0+ rd),
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gen_ext(jh,
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@ -4717,11 +4717,6 @@ void vm_impl<ARCH>::gen_instr_epilogue(jit_holder& jh) {
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cc.mov(current_trap_state, get_ptr_for(jh, traits::TRAP_STATE));
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cc.cmp(current_trap_state, 0);
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cc.jne(jh.trap_entry);
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// TODO: Does not need to be done for every instruction, only when needed (by plugin)
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cc.comment("//write back regs to mem");
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write_reg_to_mem(jh, jh.pc, traits::PC);
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write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC);
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}
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template <typename ARCH>
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void vm_impl<ARCH>::gen_block_prologue(jit_holder& jh){
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@ -4737,10 +4732,7 @@ void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
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cc.bind(jh.trap_entry);
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cc.comment("//Prepare for enter_trap;");
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// Make sure cached values are written back
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cc.comment("//write back regs to mem");
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write_reg_to_mem(jh, jh.pc, traits::PC);
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write_reg_to_mem(jh, jh.next_pc, traits::NEXT_PC);
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this->write_back(jh);
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this->gen_sync(jh, POST_SYNC, -1);
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x86::Gp current_trap_state = get_reg_for(jh, traits::TRAP_STATE);
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@ -4750,7 +4742,7 @@ void vm_impl<ARCH>::gen_block_epilogue(jit_holder& jh){
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cc.mov(current_pc, get_ptr_for(jh, traits::PC));
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x86::Gp instr = cc.newInt32("instr");
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cc.mov(instr, 0); // this is not correct
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cc.mov(instr, 0); // FIXME:this is not correct
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cc.comment("//enter trap call;");
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InvokeNode* call_enter_trap;
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cc.invoke(&call_enter_trap, &enter_trap, FuncSignatureT<uint64_t, void*, uint64_t, uint64_t, uint64_t>());
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