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aaceecd5dc
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fix mu_p platform features and CSRs
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2021-05-17 09:20:09 +02:00 |
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cf7b62a3f9
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update names
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2021-05-13 15:54:48 +02:00 |
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32e4aa83b8
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use extracted variables
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2021-03-27 09:36:52 +00:00 |
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78c7064295
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update groovy template to extract used registers
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2021-03-26 08:24:45 +00:00 |
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b0bcb7febb
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small fixes for robustness and readability
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2021-03-22 22:47:30 +00:00 |
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4e0f20eba0
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rework abort conditions
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2021-03-17 19:32:57 +00:00 |
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ff3fa19208
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fix RVM description bugs
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2021-03-13 10:46:41 +00:00 |
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80057eef32
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fix RVC description bugs, remove paged fetch
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2021-03-13 10:46:41 +00:00 |
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f4ec21007b
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fix signedness issues
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2021-03-11 16:12:28 +00:00 |
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ac8eab6e25
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update RISC-V desciptions
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2021-03-10 17:31:10 +00:00 |
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bea0dcc387
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update missing XLEN
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2021-03-09 11:03:37 +00:00 |
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a6691bcd3c
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update generated code with correct sign extension
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2021-03-09 10:21:36 +00:00 |
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c171e3c1ba
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update CoreDSL descriptions
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2021-03-07 10:51:15 +00:00 |
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c251fe15d5
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fix desscriptions to conform to ISA spec version 20191213 and TGF-C
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2021-03-07 10:51:00 +00:00 |
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dae8acb8a3
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checkpoint before refactor
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2021-03-06 07:17:42 +00:00 |
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be0e7db185
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fix templates to comply with CoreDSL2
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2021-03-01 21:07:20 +00:00 |
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9534d58d01
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regenerated sources and and add opcode enum to headers
Conflicts:
gen_input/CoreDSL-Instruction-Set-Description
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2021-03-01 06:26:33 +00:00 |
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1668df0531
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regenerated sources and and add opcode enum to headers
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2021-02-23 08:29:31 +00:00 |
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d8e009c72b
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update CoreDSL decriptions
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2021-02-15 18:15:13 +00:00 |
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72b09472d5
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update RISC-V descriptions
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2021-02-15 18:01:33 +00:00 |
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3261055871
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update description to latest CoreDSL2
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2021-02-15 11:35:56 +00:00 |
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34bb8e62ae
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generate working ISS from CoreDSL 2.0
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2021-02-06 14:47:06 +00:00 |
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da7e29fbb7
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update definitions of derived constants
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2021-01-01 09:19:48 +00:00 |
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c4da47cedd
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integrate code generation into build process (first attempt)
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2020-12-30 07:29:52 +00:00 |
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ab554539e3
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first version of tgf_c based on CoreDSL 2.0
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2020-12-29 08:48:22 +00:00 |
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43488676dd
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Update TGF naming convention
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2020-09-11 10:45:44 +02:00 |
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9754e3953f
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Generate and integrate TGF cores in Ecosystem-VP. Remove obsolete cores
|
2020-08-24 15:01:54 +02:00 |
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03172e352d
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move CoreDSL instraction set description files into a dedicated repository CoreDSL-Instruction-Set-Description
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2020-08-21 15:57:01 +02:00 |
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8fce0c4759
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Generate TGF01 and TGF02 cores
|
2020-08-20 17:29:36 +02:00 |
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18976e2ce4
|
adapt to newer gdb protocol
|
2020-06-22 08:45:12 +02:00 |
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55450f4900
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[WIP] update dependencies in core desc
|
2020-06-18 06:18:59 +02:00 |
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abcfb75011
|
[WIP]
|
2020-05-31 16:41:04 +02:00 |
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10797a473d
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modernize build system and cleanup dependencies
|
2020-05-30 14:16:10 +02:00 |
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0ff6ccf9e2
|
get all compile clean
|
2020-05-30 11:27:44 +02:00 |
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0698b604fd
|
add TCC backend
|
2020-05-29 08:52:55 +02:00 |
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264053a8d6
|
[WIP] add next increment for TCC
|
2020-04-17 19:23:43 +02:00 |
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ae1c0b99fe
|
[WIP] basic infrastructure working
|
2020-04-13 17:03:50 +02:00 |
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8cdf50d69e
|
[WIP] implement basic infrastructure
|
2020-04-12 12:44:30 +02:00 |
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15f4c059e6
|
[WIP] first working version
|
2020-01-12 18:19:48 +01:00 |
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e483887c43
|
[WIP] Cleanup of namespaces etc to get compile clean
|
2020-01-10 11:12:20 +01:00 |
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fd2e40bfd2
|
Initial setup
|
2020-01-10 07:24:00 +01:00 |
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116ed9bb5c
|
[WIP] started to add TinyCC backend
|
2020-01-09 19:43:17 +01:00 |
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8b9775e06b
|
Changed namespaces for LLVM related stuff
|
2020-01-07 16:38:31 +01:00 |
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1947a2114f
|
Fixed FMT header define
|
2019-07-14 16:51:14 +02:00 |
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7f06bba239
|
Fixed time csr handling
|
2019-06-28 20:58:02 +02:00 |
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67d9beb7bd
|
reorganized layout to only contain risc-v stuff
|
2019-06-11 16:49:37 +00:00 |
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