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a92b84bef4
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add code word access for ISS plugins
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2022-04-25 14:18:19 +02:00 |
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477c530847
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extend debug mode handling
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2022-04-13 11:41:01 +02:00 |
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c054d75717
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update to latest coredsl description
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2022-04-10 18:55:44 +02:00 |
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15cd26f800
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remove CoreDSL ISA repo
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2022-04-10 12:15:40 +02:00 |
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9465cffe79
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adapt to change in dbt-rise-core
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2022-04-09 14:55:36 +02:00 |
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00d2d06cbd
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adapt to privileged spec
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2022-03-31 20:33:12 +02:00 |
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8e4e702cb9
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Merge remote-tracking branch 'origin/feature/reduced_output' into develop
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2022-03-28 14:09:06 +02:00 |
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58311b37db
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Merge branch 'feature/reduced_output' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into
feature/reduced_output
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2022-03-28 11:16:09 +02:00 |
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ad8dc09bee
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Merge branch 'feature/reduced_output' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into feature/reduced_output
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2022-03-28 11:15:45 +02:00 |
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49be143588
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make features configurable
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2022-03-27 17:54:08 +02:00 |
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0aea1d0177
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remove mcounteren in M-mode only wrapper
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2022-03-27 17:21:46 +02:00 |
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6ea7721961
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add TCM
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2022-03-27 15:38:18 +02:00 |
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b0cb997009
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add TGC_X with DMR
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2022-03-26 10:48:21 +01:00 |
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9dfca612b7
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add hardware loop CSR access
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2022-03-25 11:33:44 +01:00 |
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30ae743361
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add pctrace plugin to iss
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2022-03-20 17:41:54 +01:00 |
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d91f5f9df4
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fix compiler warning for reduced number of registers
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2022-03-14 15:38:05 +01:00 |
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5ec457c76b
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build pctrace plugin only if RapidJSON target is availble
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2022-03-08 11:23:07 +01:00 |
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2e670c4d03
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change interpreter structure
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2022-03-06 15:11:38 +01:00 |
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3d32c33333
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update gitignore
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2022-03-05 20:59:45 +01:00 |
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521f40a3d6
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refactored interpreter backend structure
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2022-03-05 20:59:17 +01:00 |
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2bba5645c3
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adds functionality to reduce the output
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2022-02-16 10:13:29 +01:00 |
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bf0a5a80de
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adds functionality to reduce the output
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2022-02-16 10:12:45 +01:00 |
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b37ef973de
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clean up
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2022-02-14 20:36:12 +01:00 |
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4c363f4073
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adds additional functionality by fetching delay information
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2022-02-11 11:28:00 +01:00 |
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b8fa5fbbda
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adapt to extended instrumentation interface
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2022-02-09 21:01:17 +01:00 |
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ac86f14a54
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add tgc_c_xrb_nn to tgc-sim
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2022-02-02 21:33:42 +01:00 |
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68b5697c8f
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Fix cycles JSON template
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2022-02-01 21:48:56 +01:00 |
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09b0f0d0c8
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fix cycle estimation plugin
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2022-02-01 21:14:50 +01:00 |
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98b418ff43
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fix JSON reading
|
2022-02-01 19:28:11 +01:00 |
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059bd0d371
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rework cycle estimation
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2022-02-01 19:03:45 +01:00 |
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ef2a4df925
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simplify spawn block handling
|
2022-01-31 23:40:31 +01:00 |
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7578906310
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adds coverage plugin
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2022-01-31 21:38:18 +01:00 |
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afe8905ac9
|
fix else-ambiguity in CoreDSL description
|
2022-01-31 20:30:46 +01:00 |
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ecc6091d1e
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cleans up source code to remove clang compiler warnings
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2022-01-19 08:01:15 +01:00 |
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3563ba80d0
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add spawn blocks
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2022-01-12 07:21:16 +01:00 |
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09955be90f
|
update gitignore
|
2021-12-05 08:45:49 +01:00 |
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dd4c19a15c
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add option to configure number of irq
|
2021-12-01 12:56:36 +01:00 |
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07d5af1dde
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fix stand-alone ISS compilation to include all generated cores
|
2021-11-26 17:56:40 +01:00 |
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6f8595759e
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make tgc-sim include all available ISS
|
2021-11-25 20:00:27 +01:00 |
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86da31033c
|
correct size usage in pmp addr checks
|
2021-11-22 15:15:47 +01:00 |
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974d103381
|
fix pmpcfg register write
|
2021-11-22 10:49:29 +01:00 |
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309758b994
|
fix clic_cfg access scheme
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2021-11-17 07:59:02 +01:00 |
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965929d1eb
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remove descriptions
|
2021-11-15 09:30:16 +01:00 |
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d47375a70e
|
fix ebreak CSR update
|
2021-11-13 12:47:23 +01:00 |
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d31b4ef5a8
|
fix MISA val
|
2021-11-11 12:58:57 +01:00 |
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7452c5df43
|
add TGC_D_XRB_NN definition
|
2021-11-11 12:16:35 +01:00 |
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43d7b99905
|
revert pmp check implementation
|
2021-11-11 09:58:19 +01:00 |
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f90c48e881
|
adapt to changed define names
|
2021-11-11 08:33:35 +01:00 |
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2d7973520b
|
fix mip handling
|
2021-11-09 19:47:34 +01:00 |
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fd98ad95f6
|
rework PMP check and fix MISA for TGC_D
|
2021-11-09 15:55:22 +01:00 |
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