|
|
c5465bf9e2
|
fixes according to fixed generator
|
2023-03-26 14:44:15 +02:00 |
|
|
|
ec55efd322
|
adds generator changed files
|
2023-02-17 06:36:34 +01:00 |
|
|
|
8c3709f92a
|
adds generator changed files
|
2023-02-17 06:29:27 +01:00 |
|
|
|
65dca13b42
|
fixes WFI miss of interrupt
|
2023-01-14 17:40:21 +01:00 |
|
|
|
8c701d55c1
|
adapt to latest changes in SCC
|
2022-12-05 09:15:48 +01:00 |
|
|
|
7113683ee0
|
moves pending interrupt check before handling trap thus saving 1 cycle
|
2022-10-15 10:47:35 +02:00 |
|
|
|
fa7eda0889
|
fixes wrong check for exception
|
2022-08-31 11:45:53 +02:00 |
|
|
|
00e02bf565
|
adds support for different branch types in tracing
|
2022-08-08 06:30:37 +02:00 |
|
|
|
4876f18ba9
|
adds windows compatibility fixes
|
2022-07-18 11:43:42 +02:00 |
|
|
|
a53ee42e13
|
updates TGC_C according to CoreDSL description update
|
2022-07-12 22:34:22 +02:00 |
|
|
|
12ccfc055a
|
updates generate tgc_c definition
|
2022-07-11 22:58:10 +02:00 |
|
|
|
feaa49d367
|
removes decoder again as there is some issue
|
2022-06-20 00:39:11 +02:00 |
|
|
|
f096b15dbd
|
factors decoder into separate component
|
2022-06-19 13:17:31 +02:00 |
|
|
|
31fb51de95
|
update tgc_c generated code
|
2022-05-30 22:15:44 +02:00 |
|
|
|
52ed8b81a6
|
fixed template to work with previous code generator
|
2022-05-30 14:08:02 +02:00 |
|
|
|
0c542d42aa
|
separate generated sources
|
2022-05-21 12:48:28 +02:00 |
|
|
|
df16378605
|
update template for changed code generator
|
2022-05-18 19:10:34 +02:00 |
|
|
|
e382217e04
|
update vm_tgc_c due reworked CoreDSL generator
|
2022-05-11 18:52:15 +02:00 |
|
|
|
03bec27376
|
implement extended instrumentation interface
|
2022-04-26 17:14:33 +02:00 |
|
|
|
9d9008a3a2
|
fix pointer mess
|
2022-04-26 15:35:17 +02:00 |
|
|
|
a92b84bef4
|
add code word access for ISS plugins
|
2022-04-25 14:18:19 +02:00 |
|
|
|
c054d75717
|
update to latest coredsl description
|
2022-04-10 18:55:44 +02:00 |
|
|
|
d91f5f9df4
|
fix compiler warning for reduced number of registers
|
2022-03-14 15:38:05 +01:00 |
|
|
|
2e670c4d03
|
change interpreter structure
|
2022-03-06 15:11:38 +01:00 |
|
|
|
521f40a3d6
|
refactored interpreter backend structure
|
2022-03-05 20:59:17 +01:00 |
|
|
|
059bd0d371
|
rework cycle estimation
|
2022-02-01 19:03:45 +01:00 |
|
|
|
afe8905ac9
|
fix else-ambiguity in CoreDSL description
|
2022-01-31 20:30:46 +01:00 |
|
|
|
ecc6091d1e
|
cleans up source code to remove clang compiler warnings
|
2022-01-19 08:01:15 +01:00 |
|
|
|
c42e336509
|
fix proper debug mode handling (#267 & #268)
|
2021-11-07 17:48:44 +01:00 |
|
|
|
1616f0ac90
|
remove deprecated functions
|
2021-10-30 12:57:08 +02:00 |
|
|
|
334d3fb296
|
adapt to SCC changes
|
2021-10-21 22:53:16 +02:00 |
|
|
|
1d13c8196e
|
fix wrong PGMASK usage
|
2021-10-11 10:40:01 +02:00 |
|
|
|
ee6e1d4092
|
Merge remote-tracking branch 'origin/msvc_compat' into develop
Conflicts:
src/sysc/core_complex.cpp
|
2021-10-11 09:42:40 +02:00 |
|
|
|
c8679fca85
|
remove MSVC warning
|
2021-10-10 19:56:33 +02:00 |
|
|
|
f0ada1ba8c
|
add MSVC 16 compatibility
|
2021-10-10 19:06:41 +02:00 |
|
|
|
2f15d9676e
|
fix unaligned instr fetch behavior
|
2021-09-30 19:27:46 +02:00 |
|
|
|
17ee7b138d
|
update generated TGC-C VM
|
2021-09-29 00:44:17 +02:00 |
|
|
|
438e598a4a
|
remove clutter from core descriptions, added instr alignment setting
|
2021-09-29 00:03:11 +02:00 |
|
|
|
174259155d
|
add support for non-compressed ISA
|
2021-09-23 21:09:52 +02:00 |
|
|
|
65b4db5eca
|
remove mcounteren in M-mode only platform
|
2021-09-18 11:40:00 +02:00 |
|
|
|
09b01af3fa
|
fix find_package use and debug access alignment check
|
2021-08-26 22:10:27 +02:00 |
|
|
|
c8681096be
|
update vm_tgfs_c to match CoreDSL
|
2021-08-14 10:57:36 +02:00 |
|
|
|
e68918c2e8
|
fix instruction decode
|
2021-07-09 07:37:12 +02:00 |
|
|
|
2f4b5bd9b2
|
fix detailed behavior of TGC_C
|
2021-07-06 21:19:36 +02:00 |
|
|
|
23b9741adf
|
refine and fix TGC_C iss to becoem compliant
|
2021-06-29 11:51:30 +02:00 |
|
|
|
e432dd8208
|
fix handling of exceptions while accessing address spaces
|
2021-06-07 22:22:36 +02:00 |
|
|
|
8c385647dd
|
remove redundant code from checked in generated sources
|
2021-05-26 23:06:31 +02:00 |
|
|
|
cf7b62a3f9
|
update names
|
2021-05-13 15:54:48 +02:00 |
|
|
|
32e4aa83b8
|
use extracted variables
|
2021-03-27 09:36:52 +00:00 |
|
|
|
78c7064295
|
update groovy template to extract used registers
|
2021-03-26 08:24:45 +00:00 |
|
|
|
b0bcb7febb
|
small fixes for robustness and readability
|
2021-03-22 22:47:30 +00:00 |
|
|
|
4e0f20eba0
|
rework abort conditions
|
2021-03-17 19:32:57 +00:00 |
|
|
|
ff3fa19208
|
fix RVM description bugs
|
2021-03-13 10:46:41 +00:00 |
|
|
|
80057eef32
|
fix RVC description bugs, remove paged fetch
|
2021-03-13 10:46:41 +00:00 |
|
|
|
f4ec21007b
|
fix signedness issues
|
2021-03-11 16:12:28 +00:00 |
|
|
|
768716b064
|
fix another missing XLEN
|
2021-03-09 11:07:56 +00:00 |
|
|
|
bea0dcc387
|
update missing XLEN
|
2021-03-09 11:03:37 +00:00 |
|
|
|
a6691bcd3c
|
update generated code with correct sign extension
|
2021-03-09 10:21:36 +00:00 |
|
|
|
40db74ce02
|
remove tgf_b code generation
|
2021-03-07 16:26:14 +00:00 |
|
|
|
c251fe15d5
|
fix desscriptions to conform to ISA spec version 20191213 and TGF-C
|
2021-03-07 10:51:00 +00:00 |
|
|
|
dae8acb8a3
|
checkpoint before refactor
|
2021-03-06 07:17:42 +00:00 |
|
|
|
be0e7db185
|
fix templates to comply with CoreDSL2
|
2021-03-01 21:07:20 +00:00 |
|
|
|
9534d58d01
|
regenerated sources and and add opcode enum to headers
Conflicts:
gen_input/CoreDSL-Instruction-Set-Description
|
2021-03-01 06:26:33 +00:00 |
|
|
|
1668df0531
|
regenerated sources and and add opcode enum to headers
|
2021-02-23 08:29:31 +00:00 |
|
|
|
72b09472d5
|
update RISC-V descriptions
|
2021-02-15 18:01:33 +00:00 |
|
|
|
34bb8e62ae
|
generate working ISS from CoreDSL 2.0
|
2021-02-06 14:47:06 +00:00 |
|
|
|
ab554539e3
|
first version of tgf_c based on CoreDSL 2.0
|
2020-12-29 08:48:22 +00:00 |
|
|
|
43488676dd
|
Update TGF naming convention
|
2020-09-11 10:45:44 +02:00 |
|
|
|
9754e3953f
|
Generate and integrate TGF cores in Ecosystem-VP. Remove obsolete cores
|
2020-08-24 15:01:54 +02:00 |
|
|
|
8fce0c4759
|
Generate TGF01 and TGF02 cores
|
2020-08-20 17:29:36 +02:00 |
|
|
|
55450f4900
|
[WIP] update dependencies in core desc
|
2020-06-18 06:18:59 +02:00 |
|
|
|
c619194465
|
[WIP] rework generator
|
2020-06-05 07:25:40 +02:00 |
|
|
|
abcfb75011
|
[WIP]
|
2020-05-31 16:41:04 +02:00 |
|
|
|
0ff6ccf9e2
|
get all compile clean
|
2020-05-30 11:27:44 +02:00 |
|
|
|
0698b604fd
|
add TCC backend
|
2020-05-29 08:52:55 +02:00 |
|
|
|
264053a8d6
|
[WIP] add next increment for TCC
|
2020-04-17 19:23:43 +02:00 |
|
|
|
ae1c0b99fe
|
[WIP] basic infrastructure working
|
2020-04-13 17:03:50 +02:00 |
|
|
|
8cdf50d69e
|
[WIP] implement basic infrastructure
|
2020-04-12 12:44:30 +02:00 |
|
|
|
50663a2fbc
|
[WIP] integrate tcc conan package
|
2020-04-10 17:14:04 +02:00 |
|
|
|
15f4c059e6
|
[WIP] first working version
|
2020-01-12 18:19:48 +01:00 |
|
|
|
e483887c43
|
[WIP] Cleanup of namespaces etc to get compile clean
|
2020-01-10 11:12:20 +01:00 |
|
|
|
fd2e40bfd2
|
Initial setup
|
2020-01-10 07:24:00 +01:00 |
|
|
|
116ed9bb5c
|
[WIP] started to add TinyCC backend
|
2020-01-09 19:43:17 +01:00 |
|
