Commit Graph

63 Commits

Author SHA1 Message Date
Eyck Jentzsch 836ba269e3 fix clic reset values 2021-08-16 15:05:05 +02:00
Eyck Jentzsch adeffe47ad fix behavior of riscv_hart_mu_p to match TGC_D 2021-08-12 20:34:10 +02:00
Eyck Jentzsch d95846a849 fix trap handling if illegal fetch (PMP) and U-mode CSRs 2021-08-01 17:23:22 +02:00
Eyck Jentzsch af887c286f fix for #2 2021-07-28 09:09:08 +02:00
Eyck Jentzsch 5ef5d57d30 Merge branch 'tmp' into develop 2021-07-27 10:49:35 +02:00
Eyck Jentzsch d7bddd825c add clic CSRs 2021-07-27 10:47:48 +02:00
Eyck Jentzsch 15f46a87db adapt core_complex to use scv-tr (scc commit id a3cde47) 2021-07-27 09:38:05 +02:00
Eyck Jentzsch d0f3a120fd fix naming in MU wrapper 2021-07-19 16:26:23 +02:00
Eyck Jentzsch c592a26346 fix mepc mask 2021-07-09 13:01:22 +02:00
Eyck Jentzsch e68918c2e8 fix instruction decode 2021-07-09 07:37:12 +02:00
Eyck Jentzsch 473f8a5a17 fix privilege behavior 2021-07-07 11:30:00 +02:00
Eyck Jentzsch 2f4b5bd9b2 fix detailed behavior of TGC_C 2021-07-06 21:19:36 +02:00
Eyck Jentzsch 23b9741adf refine and fix TGC_C iss to becoem compliant 2021-06-29 11:51:30 +02:00
Eyck Jentzsch 5d8da08ce5 fix linker issue
the root cuase of the issue is the template paramter deduction which led
to the wrong template parameter.
2021-06-26 14:30:36 +02:00
Eyck Jentzsch e432dd8208 fix handling of exceptions while accessing address spaces 2021-06-07 22:22:36 +02:00
Eyck Jentzsch aaceecd5dc fix mu_p platform features and CSRs 2021-05-17 09:20:09 +02:00
Eyck Jentzsch d41e1d816a add factory for ISS and use it in main.cpp 2021-05-16 16:44:14 +02:00
Eyck Jentzsch a35974c9f5 make cpu type in core_complex configurable 2021-05-16 15:06:42 +02:00
Eyck Jentzsch 9c456ba8f2 initial version of MU hart 2021-05-14 13:29:39 +02:00
Eyck Jentzsch cf7b62a3f9 update names 2021-05-13 15:54:48 +02:00
Eyck Jentzsch 391f9bb808 remove unneeded constants 2021-05-08 15:14:19 +02:00
Stanislaw Kaushanski ef02dba8c5 add read misa callback 2021-04-09 11:20:51 +02:00
Stanislaw Kaushanski 2f4cfb68dc update to latest SCC 2021-04-07 18:56:46 +02:00
Stanislaw Kaushanski 7009943106 fix wait for interrupt. Adapt for new SCC structure 2021-04-07 17:42:08 +02:00
Eyck Jentzsch 0a76ccbdac make RSP register response independend of register definition 2021-03-31 07:48:46 +00:00
Eyck Jentzsch b0bcb7febb small fixes for robustness and readability 2021-03-22 22:47:30 +00:00
Stanislaw Kaushanski c941890901 SCC refactoring 2021-03-22 14:50:53 +01:00
Eyck Jentzsch 51fbc34fb3 change namespace of core complex 2021-03-22 11:57:40 +00:00
Eyck Jentzsch f4ec21007b fix signedness issues 2021-03-11 16:12:28 +00:00
Stanislaw Kaushanski b7c0fb2b1c fix bitfield structure 2021-03-10 12:40:06 +01:00
Eyck Jentzsch 40db74ce02 remove tgf_b code generation 2021-03-07 16:26:14 +00:00
Eyck Jentzsch c251fe15d5 fix desscriptions to conform to ISA spec version 20191213 and TGF-C 2021-03-07 10:51:00 +00:00
Eyck Jentzsch dae8acb8a3 checkpoint before refactor 2021-03-06 07:17:42 +00:00
Eyck Jentzsch be0e7db185 fix templates to comply with CoreDSL2 2021-03-01 21:07:20 +00:00
Eyck Jentzsch 4aa26b85a0 adapt to change in SCC 2021-03-01 06:36:27 +00:00
Eyck Jentzsch 9534d58d01 regenerated sources and and add opcode enum to headers
Conflicts:
	gen_input/CoreDSL-Instruction-Set-Description
2021-03-01 06:26:33 +00:00
Eyck Jentzsch 1668df0531 regenerated sources and and add opcode enum to headers 2021-02-23 08:29:31 +00:00
Eyck Jentzsch d07c8679ed update core definition 2021-02-15 18:14:52 +00:00
Eyck Jentzsch 72b09472d5 update RISC-V descriptions 2021-02-15 18:01:33 +00:00
Eyck Jentzsch 34bb8e62ae generate working ISS from CoreDSL 2.0 2021-02-06 14:47:06 +00:00
Eyck Jentzsch da7e29fbb7 update definitions of derived constants 2021-01-01 09:19:48 +00:00
Eyck Jentzsch c4da47cedd integrate code generation into build process (first attempt) 2020-12-30 07:29:52 +00:00
Eyck Jentzsch ab554539e3 first version of tgf_c based on CoreDSL 2.0 2020-12-29 08:48:22 +00:00
Stanislaw Kaushanski 43488676dd Update TGF naming convention 2020-09-11 10:45:44 +02:00
Stanislaw Kaushanski f3d578f050 Remove 64bit support 2020-09-07 14:30:19 +02:00
Stanislaw Kaushanski 293c396a0d update core wrapper: remove virtual memory support 2020-09-07 13:29:45 +02:00
Stanislaw Kaushanski 6f3963a473 Strip down privileged modes. Only machine mode is supported 2020-09-07 11:54:45 +02:00
Stanislaw Kaushanski 969b408288 Implement MHARTID register 2020-09-04 15:37:21 +02:00
Stanislaw Kaushanski 9754e3953f Generate and integrate TGF cores in Ecosystem-VP. Remove obsolete cores 2020-08-24 15:01:54 +02:00
Stanislaw Kaushanski 8fce0c4759 Generate TGF01 and TGF02 cores 2020-08-20 17:29:36 +02:00