Eyck-Alexander Jentzsch
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bb658be3b4
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2022-05-08 15:25:56 +02:00 |
Eyck-Alexander Jentzsch
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6579780dc9
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add call column in output
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2022-05-08 15:24:26 +02:00 |
Eyck Jentzsch
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e56bc12788
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fix non-lz4 build of plugin
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2022-05-07 17:27:11 +02:00 |
Eyck Jentzsch
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e88f309ea2
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add lz4 compression to pctrace
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2022-05-07 17:22:06 +02:00 |
Eyck Jentzsch
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03bec27376
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implement extended instrumentation interface
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2022-04-26 17:14:33 +02:00 |
Eyck Jentzsch
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9d9008a3a2
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fix pointer mess
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2022-04-26 15:35:17 +02:00 |
Stanislaw Kaushanski
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5f6d462973
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check that no interrupts are pending before entering the wfi wait
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2022-04-26 13:58:20 +02:00 |
Eyck Jentzsch
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a92b84bef4
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add code word access for ISS plugins
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2022-04-25 14:18:19 +02:00 |
Eyck Jentzsch
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c054d75717
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update to latest coredsl description
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2022-04-10 18:55:44 +02:00 |
Eyck Jentzsch
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8e4e702cb9
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Merge remote-tracking branch 'origin/feature/reduced_output' into develop
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2022-03-28 14:09:06 +02:00 |
Eyck-Alexander Jentzsch
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58311b37db
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Merge branch 'feature/reduced_output' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into
feature/reduced_output
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2022-03-28 11:16:09 +02:00 |
Eyck Jentzsch
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b0cb997009
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add TGC_X with DMR
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2022-03-26 10:48:21 +01:00 |
Eyck Jentzsch
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30ae743361
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add pctrace plugin to iss
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2022-03-20 17:41:54 +01:00 |
Eyck Jentzsch
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d91f5f9df4
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fix compiler warning for reduced number of registers
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2022-03-14 15:38:05 +01:00 |
Eyck Jentzsch
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2e670c4d03
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change interpreter structure
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2022-03-06 15:11:38 +01:00 |
Eyck Jentzsch
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521f40a3d6
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refactored interpreter backend structure
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2022-03-05 20:59:17 +01:00 |
Eyck-Alexander Jentzsch
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2bba5645c3
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adds functionality to reduce the output
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2022-02-16 10:13:29 +01:00 |
Eyck-Alexander Jentzsch
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4c363f4073
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adds additional functionality by fetching delay information
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2022-02-11 11:28:00 +01:00 |
Eyck Jentzsch
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ac86f14a54
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add tgc_c_xrb_nn to tgc-sim
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2022-02-02 21:33:42 +01:00 |
Eyck Jentzsch
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09b0f0d0c8
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fix cycle estimation plugin
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2022-02-01 21:14:50 +01:00 |
Eyck Jentzsch
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98b418ff43
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fix JSON reading
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2022-02-01 19:28:11 +01:00 |
Eyck Jentzsch
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059bd0d371
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rework cycle estimation
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2022-02-01 19:03:45 +01:00 |
Eyck-Alexander Jentzsch
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7578906310
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adds coverage plugin
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2022-01-31 21:38:18 +01:00 |
Eyck Jentzsch
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afe8905ac9
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fix else-ambiguity in CoreDSL description
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2022-01-31 20:30:46 +01:00 |
Eyck-Alexander Jentzsch
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ecc6091d1e
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cleans up source code to remove clang compiler warnings
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2022-01-19 08:01:15 +01:00 |
Eyck Jentzsch
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07d5af1dde
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fix stand-alone ISS compilation to include all generated cores
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2021-11-26 17:56:40 +01:00 |
Eyck Jentzsch
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6f8595759e
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make tgc-sim include all available ISS
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2021-11-25 20:00:27 +01:00 |
Eyck Jentzsch
|
f90c48e881
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adapt to changed define names
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2021-11-11 08:33:35 +01:00 |
Eyck Jentzsch
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c42e336509
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fix proper debug mode handling (#267 & #268)
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2021-11-07 17:48:44 +01:00 |
Stanislaw Kaushanski
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a89f00da19
|
fix plugins parameter utilization
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2021-11-02 11:03:17 +01:00 |
Eyck Jentzsch
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1616f0ac90
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remove deprecated functions
|
2021-10-30 12:57:08 +02:00 |
Eyck Jentzsch
|
334d3fb296
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adapt to SCC changes
|
2021-10-21 22:53:16 +02:00 |
Eyck Jentzsch
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eb2ca33e5a
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remove unused sources
|
2021-10-12 15:17:56 +02:00 |
Eyck Jentzsch
|
0ea4cba1ca
|
add dynamic plugin loading
|
2021-10-12 14:24:55 +02:00 |
Eyck Jentzsch
|
1d13c8196e
|
fix wrong PGMASK usage
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2021-10-11 10:40:01 +02:00 |
Eyck Jentzsch
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ee6e1d4092
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Merge remote-tracking branch 'origin/msvc_compat' into develop
Conflicts:
src/sysc/core_complex.cpp
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2021-10-11 09:42:40 +02:00 |
Eyck Jentzsch
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c8679fca85
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remove MSVC warning
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2021-10-10 19:56:33 +02:00 |
Eyck Jentzsch
|
f0ada1ba8c
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add MSVC 16 compatibility
|
2021-10-10 19:06:41 +02:00 |
Eyck Jentzsch
|
2f15d9676e
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fix unaligned instr fetch behavior
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2021-09-30 19:27:46 +02:00 |
Eyck Jentzsch
|
17ee7b138d
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update generated TGC-C VM
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2021-09-29 00:44:17 +02:00 |
Eyck Jentzsch
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438e598a4a
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remove clutter from core descriptions, added instr alignment setting
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2021-09-29 00:03:11 +02:00 |
Eyck Jentzsch
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174259155d
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add support for non-compressed ISA
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2021-09-23 21:09:52 +02:00 |
Eyck Jentzsch
|
65b4db5eca
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remove mcounteren in M-mode only platform
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2021-09-18 11:40:00 +02:00 |
Eyck Jentzsch
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0fd82f1f3c
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add tgc_d_xrb_mac to SC and C++ ISS
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2021-09-04 13:04:34 +02:00 |
Eyck Jentzsch
|
09b01af3fa
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fix find_package use and debug access alignment check
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2021-08-26 22:10:27 +02:00 |
Eyck Jentzsch
|
2f05083cf0
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fix elf loader and pmp check for debug accesses
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2021-08-19 10:50:25 +02:00 |
Eyck Jentzsch
|
e934049dd4
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fix inconsistency due to PA adaptation
|
2021-08-16 17:55:14 +02:00 |
Eyck Jentzsch
|
94f796ebdb
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add install target and PA compatibility
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2021-08-16 17:02:31 +02:00 |
Eyck Jentzsch
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c8681096be
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update vm_tgfs_c to match CoreDSL
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2021-08-14 10:57:36 +02:00 |
Eyck Jentzsch
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15f46a87db
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adapt core_complex to use scv-tr (scc commit id a3cde47)
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2021-07-27 09:38:05 +02:00 |