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9c51d6eade
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improves interp, only calls decode once per instr
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2024-08-07 09:20:11 +02:00 |
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2878dca6b5
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updates templates
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2024-08-06 08:32:05 +02:00 |
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c28e8fd00c
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removes left-overs
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2024-08-04 18:57:20 +02:00 |
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b3cc9d2346
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makes core_complex a template
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2024-08-04 18:47:32 +02:00 |
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933f08494c
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removes C++17 dependency from asmjit backend
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2024-08-04 17:41:49 +02:00 |
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21f8eab432
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adds regenerated tgc5c
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2024-08-02 19:18:28 +02:00 |
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6ddb8da07f
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fixes missing rename
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2024-08-02 11:58:51 +02:00 |
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edf456c59f
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fixes missing braces
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2024-08-02 10:33:15 +02:00 |
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42efced1eb
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fixes FCSR behavior if no floating point is implemented
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2024-08-02 08:59:22 +02:00 |
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c376e34b2b
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applies clang format
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2024-08-01 11:02:10 +02:00 |
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f579ec6e48
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changes access to rounding mode to fail explicitly instead of unintended behavior
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2024-07-31 12:30:41 +02:00 |
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fd20e66f1f
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changes softfloat API usage, all effected Instrs pass test suite
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2024-07-31 12:30:41 +02:00 |
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5d69b79232
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reverts patches in softfloat
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2024-07-31 12:30:41 +02:00 |
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2edd68d1bd
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refactors zeroProd branch to allow for better case handling
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2024-07-31 12:30:41 +02:00 |
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7ffa7667b6
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fixes concerning FMADD_S, FMSUB_S, FNMADD_S, and FNSUB_S
mostly about ensuring correct sign
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2024-07-31 12:30:41 +02:00 |
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93d89e07ca
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removes wrong compile definition
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2024-07-31 12:30:41 +02:00 |
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17dcba4b90
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updates softfloat to #b51ef8f of softfloat3
https://github.com/ucb-bar/berkeley-softfloat-3/
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2024-07-31 12:30:41 +02:00 |
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39d2518fdd
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checkin: tgc5f builds and runs through
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2024-07-31 12:30:41 +02:00 |
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a365110054
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fix format
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2024-07-30 13:34:23 +02:00 |
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d2efb23ff7
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fixes cache behavior for fetches
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2024-07-25 19:33:50 +02:00 |
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04b7a09b19
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updates date in templates
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2024-07-25 17:25:12 +02:00 |
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72b11beac5
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moves decoder to dbt-rise-core
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2024-07-25 10:13:38 +02:00 |
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e87b7d5fd0
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applies clang-format
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2024-07-24 14:48:50 +02:00 |
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5a2b96ef3e
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adds logging categories for ISS
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2024-07-24 12:30:07 +02:00 |
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c6b99cd155
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introduces new decoder to interp backend
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2024-07-24 12:28:35 +02:00 |
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b1306c3a47
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improves instruction decoding by avoiding copying, replaces .size()
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2024-07-24 08:54:37 +02:00 |
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0d6bf924ed
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changes jh.globals from map to vector
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2024-07-23 15:45:51 +02:00 |
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86de536c8f
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changes jh globals to seperate riscv specifics
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2024-07-23 14:35:31 +02:00 |
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051dd5e2d3
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updates templates for decoder in seperate class, adds again generated templates
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2024-07-23 13:46:10 +02:00 |
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e3942be776
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Introduces decoder in a seperate class
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2024-07-23 13:08:53 +02:00 |
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6ee484a771
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moves instruction decoder into own class
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2024-07-23 11:30:33 +02:00 |
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60808c8649
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corrects template since util fns are no longer vm_base members
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2024-07-23 11:29:56 +02:00 |
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0432803d82
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updates templates and vm impls for better LAST_BRANCH handling
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2024-07-22 09:04:17 +02:00 |
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4f5d9214ed
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adds newly generated instr.yaml
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2024-07-18 14:31:36 +02:00 |
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d42d2ce533
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corrects illegal instruction for llvm
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2024-07-18 14:04:23 +02:00 |
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236d12d7f5
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integrates gen_bool for Conditions (was truncation) into llvm
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2024-07-18 13:30:42 +02:00 |
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e1b6cab890
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removes setting of NEXT_PC to max when trapping in llvm and asmjit, adds default disass to llvm
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2024-07-18 12:02:40 +02:00 |
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8361f88718
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removes setting of NEXT_PC to max if trap
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2024-07-18 11:37:53 +02:00 |
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2ec7ea4b41
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removes leftover gen_sync in asmjit
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2024-07-17 22:39:12 +02:00 |
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b24965d321
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corrects gen_sync update order, improves illegal instruction
|
2024-07-17 20:52:01 +02:00 |
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244bf6d2f2
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corrects gen_sync before trap check, improves illegal_instruction
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2024-07-17 20:25:49 +02:00 |
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1a4465a371
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changes template: adds correct illegal instruction, reorders gen_sync to allow correct instr id eve when trapping, adds newly generated vm
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2024-07-17 19:59:01 +02:00 |
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fa82a50824
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fixes typo in templates
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2024-07-17 17:24:17 +02:00 |
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6dc17857da
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updates template
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2024-07-17 15:36:08 +02:00 |
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11a30caae8
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integrates generator changes to canPrecompute
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2024-07-17 15:14:13 +02:00 |
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ac1a26a10c
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integrates new tval changes into llvm
|
2024-07-17 14:17:02 +02:00 |
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7a199e122d
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integrates new tval changes into asmjit
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2024-07-17 09:42:12 +02:00 |
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d8c3d2e19c
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integrates new tval changes into tcc
|
2024-07-16 17:35:23 +02:00 |
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375755999a
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integrates new tval changes
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2024-07-16 15:32:35 +02:00 |
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9996fd4833
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change cache line size to 64
|
2024-07-11 14:03:58 +02:00 |
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