fixes concerning FMADD_S, FMSUB_S, FNMADD_S, and FNSUB_S
mostly about ensuring correct sign
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93d89e07ca
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@ -92,11 +92,14 @@ float32_t
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goto infProdArg;
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}
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if ( expC == 0xFF ) {
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// expC indicates special value
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if ( sigC ) {
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//uiC is quiet NaN
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uiZ = 0;
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goto propagateNaN_ZC;
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}
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uiZ = uiC;
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//uiC is +- infinity
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uiZ = (uiC & ~(1UL << 31)) | ((unsigned long)signC << 31); //set sign bit
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goto uiZ;
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}
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/*------------------------------------------------------------------------
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@ -209,12 +212,13 @@ float32_t
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/*------------------------------------------------------------------------
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*------------------------------------------------------------------------*/
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zeroProd:
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uiZ = uiC;
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uiZ = (uiC & ~(1UL << 31)) | ((unsigned long)signC << 31); //set sign bit
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if ( ! (expC | sigC) && (signProd != signC) ) {
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completeCancellation:
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uiZ =
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packToF32UI(
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(softfloat_roundingMode == softfloat_round_min), 0, 0 );
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uiZ = (uiZ & ~(1UL << 31)) | ((unsigned long)(signC|signProd) << 31); //set sign bit
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}
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uiZ:
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uZ.ui = uiZ;
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@ -149,11 +149,17 @@ uint32_t fcvt_s(uint32_t v1, uint32_t op, uint8_t mode) {
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}
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uint32_t fmadd_s(uint32_t v1, uint32_t v2, uint32_t v3, uint32_t op, uint8_t mode) {
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// Used values for op are:
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// FMADD_S: 0b00
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// FMSUB_S: 0b01
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// FNMADD_S: 0b10
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// FNMSUB_S: 0b11
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// op should be {softfloat_mulAdd_subProd(2), softfloat_mulAdd_subC(1)}
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softfloat_roundingMode = rmm_map[mode & 0x7];
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softfloat_exceptionFlags = 0;
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float32_t res = softfloat_mulAddF32(v1, v2, v3, op & 0x1);
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if(op > 1)
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// Do not invert quiet NaN
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if((op & 0b10) && (res.v != quiet_nan32))
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res.v ^= 1ULL << 31;
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return res.v;
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}
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