Commit Graph

91 Commits

Author SHA1 Message Date
Eyck Jentzsch 980c8031c3 fixes tohost behavior of SC wrapper and cycle-estimate plugin 2023-10-25 20:37:10 +02:00
Eyck Jentzsch b86d7a517d adds dynamic cycle estimation 2023-10-25 17:13:52 +02:00
Eyck Jentzsch 74ff1d455a fixes install routine 2023-10-20 20:38:59 +02:00
Stanislaw Kaushanski 9180ad1f9c debugger memory accesses should never lead to traps 2023-10-06 21:39:48 +02:00
Eyck Jentzsch b97853ff5a update plugins to read YAML file 2023-09-30 22:10:24 +02:00
Eyck Jentzsch b7f023756e fixes constructor calls of derived riscv_hart classes 2023-09-27 07:51:49 +02:00
Eyck Jentzsch 3fb8fe765a aligns riscv_hart_msu_vp with riscv_hart_m_p 2023-09-26 20:17:26 +02:00
Eyck-Alexander Jentzsch 5fd226b670 moves pctrace 2023-09-25 09:44:51 +02:00
Eyck-Alexander Jentzsch 8db0cc5d05 removes clutter 2023-09-23 10:34:58 +02:00
Eyck-Alexander Jentzsch 212fb1c8ff adds tracing functionality 2023-09-22 12:40:35 +02:00
Eyck-Alexander Jentzsch 633c0d21a0 Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop 2023-09-20 15:17:43 +02:00
Eyck-Alexander Jentzsch 51f6fbe0dd applies newest CoreDSL changes 2023-09-20 15:12:03 +02:00
Eyck-Alexander Jentzsch de45d06878 adds initial working version of llvm backend 2023-09-19 16:26:07 +02:00
Eyck Jentzsch b5d915f389 fixes compile issues from merge 2023-08-30 15:49:28 +02:00
Eyck Jentzsch 813b40409d Merge branch 'develop' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into develop
2023-08-30 10:05:42 +02:00
Eyck Jentzsch c8a4a4c736 renames core(s) 2023-08-28 07:09:55 +02:00
Eyck Jentzsch 20e920338c removes v2p function 2023-08-04 13:08:10 +02:00
Eyck Jentzsch 24de2bbdf5 purge build system 2023-07-30 13:55:57 +02:00
Eyck Jentzsch 957145ca84 add SystemC ISS factory 2023-07-14 11:11:03 +02:00
Eyck Jentzsch 0b719a4b57 fixes literal type 2023-07-10 20:39:02 +02:00
Eyck Jentzsch 250ea3c980 extends factory to support SystemC core wrapper 2023-07-09 18:19:59 +02:00
Eyck-Alexander Jentzsch 7b31b8ca8e adds updated generated files 2023-07-09 16:58:47 +02:00
Eyck-Alexander Jentzsch 87b4082633 Merge branch 'tmp' into develop 2023-07-03 14:22:50 +02:00
Eyck Jentzsch 4dbc7433a5 fixes cause CSR handling 2023-06-12 17:38:56 +02:00
Eyck Jentzsch 99a9970ddd fixes sysc compile issues 2023-06-12 09:58:24 +02:00
Eyck Jentzsch 0b5de90fb1 changes [m|u]cause rd/wr handling 2023-06-11 18:29:58 +02:00
Eyck-Alexander Jentzsch 2281ec4144 corrects errors and adds new backend and 2023-06-05 15:18:27 +02:00
Eyck-Alexander Jentzsch 11c481cec2 adds verbosity to error 2023-06-05 15:17:16 +02:00
Eyck Jentzsch a123beb301 fixes duplicate variable declaration and templates 2023-05-27 10:20:49 +02:00
Eyck Jentzsch ee6218279e adapts to latest code gen changes 2023-05-25 12:52:30 +02:00
Eyck-Alexander Jentzsch 6ed7eafc5d adds inital version of tcc backend 2023-05-16 21:51:35 +02:00
Eyck Jentzsch 32848ec396 fixes build system and typo in wt_cache 2023-05-13 16:57:01 +02:00
Eyck Jentzsch aa70d8a54a fixes CLIC to match clicinfo description in CLIC spec 11.04.2023 2023-05-02 17:22:13 +02:00
Eyck Jentzsch d990f1cf5d fixes reading of 64bit CSR register 2023-05-01 22:23:35 +02:00
Eyck Jentzsch 1672b01e62 adds WT cache functionality as mixin 2023-04-28 20:38:07 +02:00
Eyck Jentzsch 00b0f101ac adapts to changes of instrumentation interface in dbt-rise-core 2023-04-28 20:38:07 +02:00
Eyck Jentzsch f626ee2684 fixes privilege wrapper for M/U to cope with 64bit 2023-04-05 15:38:25 +02:00
Eyck Jentzsch 98dd329833 fixes CSR access rights 2023-04-04 09:23:08 +02:00
Eyck Jentzsch 6213445bc4 fixes 64bit behavior of CSR regs 2023-03-27 12:04:43 +02:00
Eyck Jentzsch 2e4faa4d50 fixes mstatus mask 2023-03-25 09:14:56 +01:00
Eyck Jentzsch 8e1951f298 adds 64bit mstatus 2023-03-23 07:47:21 +01:00
Eyck Jentzsch 7efa924510 fixes m/uintstatus read 2023-03-17 10:51:39 +01:00
Eyck Jentzsch febbc4fff0 fixes m/uintstatus read 2023-03-17 10:23:05 +01:00
Eyck Jentzsch 39b2788b7e implements and fixes CLIC CSR behavior 2023-03-17 09:09:09 +01:00
Eyck Jentzsch a943dd3bdf fixes wrong array size which led to unintended CSR definitions 2023-03-15 14:16:08 +01:00
Eyck Jentzsch fedbff5971 fixes xcause and u-mode clic CSRs 2023-03-15 12:27:39 +01:00
Eyck Jentzsch c2758e8321 removes mscratchcsw from CLIC feature 2023-03-15 09:07:00 +01:00
Eyck Jentzsch 8be5fe71df fixes template name typo 2023-03-12 07:42:09 +01:00
Eyck Jentzsch 3f7ce41b9d fixes CLIC mtvt register behavior 2023-03-11 14:03:03 +01:00
Eyck Jentzsch ad1cbedf00 adds back missing max irq functions 2023-03-11 12:47:10 +01:00