 eyck
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428d3ac285
|
fixes linker script
|
2025-03-06 11:24:43 +01:00 |
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|
eyck
|
06cbc26688
|
fixes memory layout of moonlight
|
2025-02-24 10:14:10 +01:00 |
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|
eyck
|
25623e74a0
|
fixes memory layout wrt to latest changes
|
2025-02-23 08:08:34 +01:00 |
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|
eyck
|
2231ae4106
|
updates sysctrl register declarations
|
2025-02-19 17:17:04 +01:00 |
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|
eyck
|
c37b7243b4
|
adds sysctrl peripheral
|
2025-02-19 16:27:01 +01:00 |
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|
eyck
|
669c85afa2
|
updates bsp based on RDL changes
|
2025-02-18 11:15:18 +01:00 |
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|
eyck
|
bfc7e9f00b
|
adds missing peripheral header files
|
2025-02-12 08:58:43 +01:00 |
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|
eyck
|
fcf8543c06
|
corrects UART base addr wrt. HW
|
2025-01-21 17:35:12 +01:00 |
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|
eyck
|
71217499f2
|
fixes changed base addresses
|
2025-01-19 20:12:35 +01:00 |
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|
eyck
|
b921b9c71f
|
fixes moonlight/ehrenberg ram size
|
2025-01-14 20:41:26 +01:00 |
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|
eyck
|
9770c7b86c
|
updates I2S registers adding fifo overflow status (#624)
|
2024-12-28 11:03:49 +01:00 |
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|
eyck
|
deba022043
|
updates timer and i2s register names
|
2024-12-28 10:05:13 +01:00 |
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|
eyck
|
ea5d61ec0b
|
adds some cosmetic fixes
|
2024-09-14 09:58:57 +02:00 |
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|
eyck
|
7a065a1d24
|
adds non-vectored interrupt handler
|
2024-08-23 21:56:15 +02:00 |
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|
eyck
|
ac3ef788f9
|
fixes naming in qspi header
|
2024-08-18 20:27:41 +02:00 |
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|
eyck
|
a00e57a8d2
|
does some cleanup
|
2024-08-11 17:30:16 +02:00 |
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|
eyck
|
5d78f839a5
|
removes attribute packed as it disables word access generation by gcc
|
2024-08-11 17:29:43 +02:00 |
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|
eyck
|
46d55f353e
|
adds signature to start of firmware
|
2024-08-11 17:29:13 +02:00 |
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|
eyck
|
d621264ef7
|
updates gpio registers
|
2024-08-09 14:20:00 +02:00 |
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|
eyck
|
785cf20e8e
|
fixes include guards
|
2024-08-04 13:27:53 +02:00 |
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|
eyck
|
79a245b7f2
|
updates Ehrenberg device files
|
2024-07-16 16:22:42 +02:00 |
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|
eyck
|
1f4b4d2bb9
|
updates ehrenberg dma device to support dual channel
|
2024-07-11 22:36:41 +02:00 |
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|
eyck
|
9d607e932a
|
updates BSP definitions for Ehrenberg
|
2024-07-01 11:41:28 +02:00 |
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|
eyck
|
daa1ed184d
|
adds missing ehrenberg devices
|
2024-06-10 12:21:20 +02:00 |
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|
eyck
|
231366cc94
|
updates ehrenberg devices and BSP
|
2024-06-10 10:13:07 +02:00 |
|
|
eyck
|
05062c5be4
|
updates Ehrenberg register description
|
2024-05-30 18:33:53 +02:00 |
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|
eyck
|
442384574b
|
Merge branch 'develop' of
https://git.minres.com/Firmware/MNRS-BM-BSP.git into develop
|
2024-05-30 18:33:35 +02:00 |
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|
eyck
|
28bf59f0e3
|
Merge branch 'develop' of https://git.minres.com/Firmware/MNRS-BM-BSP.git into develop
|
2024-03-15 08:35:58 +01:00 |
|
|
eyck
|
da52573163
|
fixes and enhances SPI register description
|
2024-03-15 08:35:46 +01:00 |
|
|
eyck
|
664dd67740
|
fixes build to adapt to renamed env
|
2024-03-02 16:08:42 +01:00 |
|
|
eyck
|
20b2485ab9
|
renames TGCP environment
|
2024-03-02 15:40:07 +01:00 |
|
|
eyck
|
20007672d2
|
adds fixes to build nanolib extensions
|
2024-03-02 12:19:13 +01:00 |
|
|
eyck
|
6523206738
|
fixes for ehrenberg platform, minres peripheral functions and nanolib
|
2024-03-02 12:18:38 +01:00 |
|
|
eyck
|
f9364c667b
|
adds newlib-nano settings
|
2024-01-16 12:26:47 +01:00 |
|
|
eyck
|
123f579105
|
fixes include paths
|
2024-01-14 20:35:05 +01:00 |
|
|
eyck
|
b5101117aa
|
cleans bsp a bit up
|
2024-01-14 08:14:57 +01:00 |
|
|
eyck
|
5e7c2cbce9
|
add default linker file for flash
|
2024-01-13 23:24:39 +01:00 |
|
|
eyck
|
13cd5cc76d
|
adds ehrenberg platform
|
2024-01-13 23:06:01 +01:00 |
|
|
eyck
|
1d55083a55
|
updates LICENSE
|
2024-01-13 08:30:30 +01:00 |
|
|
eyck
|
1c600a0458
|
removes firmwares to just keep BSP
|
2024-01-13 08:28:11 +01:00 |
|
|
eyck
|
7728785e27
|
Merge remote-tracking branch 'origin/develop'
|
2024-01-13 08:23:56 +01:00 |
|
|
eyck
|
51c8a93336
|
fixes march definitions for dhrystone and coremark
|
2023-12-09 16:38:45 +01:00 |
|
|
eyck
|
fe1136c7ce
|
fixes ISA handling
|
2023-12-06 10:00:33 +01:00 |
|
|
eyck
|
6ff0161882
|
adds some consistency fixes for variable ISA settings
|
2023-12-02 17:41:14 +01:00 |
|
|
eyck
|
8c1c2766e8
|
Merge branch 'develop' into main
|
2023-12-02 16:27:30 +01:00 |
|
|
eyck
|
1b8f78fe78
|
makes build more configurable by CLI
|
2023-11-27 10:13:22 +01:00 |
|
|
eyck
|
0188d404de
|
fixes hifive1 build
|
2023-11-24 11:39:23 +01:00 |
|
|
eyck
|
db53376533
|
Merge branch 'develop' into main
|
2023-11-23 18:30:43 +01:00 |
|
|
eyck
|
41f204e304
|
adds wrapping to all clib symbols
|
2023-11-23 18:29:26 +01:00 |
|
|
eyck
|
acf20a4818
|
adds missing files
|
2023-11-23 18:14:41 +01:00 |
|
|
eyck
|
aab4d1f2a0
|
adds missing symbols and sources for libwrap
|
2023-11-23 18:14:41 +01:00 |
|
|
eyck
|
e91ce0148b
|
adds build targets
|
2023-10-30 07:51:59 +01:00 |
|
|
eyck
|
7093e47c08
|
adds a CMakeLists.txt message to indicate board selection
|
2023-10-27 22:16:21 +02:00 |
|
|
eyck
|
63f57b9ba1
|
extends eclipse build configs
|
2023-10-26 06:11:12 +02:00 |
|
|
eyck
|
af3a154882
|
adds tgc-vp environment
|
2023-10-25 20:35:44 +02:00 |
|
|
eyck
|
b082091db2
|
adds missing files
|
2023-09-30 20:31:58 +02:00 |
|
|
eyck
|
eeb17437ee
|
adds missing symbols and sources for libwrap
|
2023-09-28 11:51:20 +02:00 |
|
|
eyck
|
9c0047b3ea
|
updates linker script for rtl env
|
2023-08-30 15:07:56 +02:00 |
|
|
eyck
|
ca1adccb2b
|
fixes TGC5L settings
|
2023-08-28 10:01:06 +02:00 |
|
|
eyck
|
3217871752
|
extends build system to propagate more settings
|
2023-08-20 16:45:54 +02:00 |
|
|
eyck
|
9dd7dcb4ce
|
adds TGC5L environment
|
2023-08-20 16:39:20 +02:00 |
|
|
eyck
|
3403edcde9
|
adds CMakeLists.txt
|
2023-08-20 15:50:00 +02:00 |
|
|
eyck
|
3a3cbf38c3
|
re-adds coremark as submodule
|
2023-08-20 15:23:05 +02:00 |
|
|
eyck
|
822696ae0d
|
cleanup
|
2023-08-20 15:20:39 +02:00 |
|
|
eyck
|
314ceeb072
|
rework structure
|
2023-08-20 15:00:51 +02:00 |
|
|
eyck
|
4c2208c1ac
|
fix wrong exit call
|
2022-11-06 17:33:39 +01:00 |
|
|
eyck
|
830c1382b9
|
add CDT project files, update binaries
|
2020-06-18 12:32:41 +02:00 |
|
|
eyck
|
27cad2f819
|
add a few more fw examples
|
2020-06-18 12:15:52 +02:00 |
|
|
eyck
|
a96cb14dcf
|
Added doxygen comments and refactored a few functions
|
2018-10-21 22:48:57 +02:00 |
|
|
eyck
|
188bd2b5dd
|
Changed delay calculation for open loop commutation
|
2018-10-21 22:29:45 +02:00 |
|
|
eyck
|
458c75c5e4
|
some renaming
|
2018-10-21 00:14:14 +02:00 |
|
|
eyck
|
9f9088a110
|
Changed naming of constants and formatting
|
2018-10-16 18:51:48 +02:00 |
|
|
eyck
|
d6db5f7e04
|
Fixed rxwm setting as it defines the maximum number of received bytes
*before* the interrupt
|
2018-10-05 12:23:39 +02:00 |
|
|
eyck
|
2a45030414
|
Added binary for easy jump start
|
2018-09-26 09:09:23 +02:00 |
|
|
eyck
|
2ebe9541d5
|
Working version
|
2018-09-26 08:07:48 +02:00 |
|
|
eyck
|
a4bfa4e679
|
cleanup of makefiles
|
2018-09-25 20:33:05 +02:00 |
|
|
eyck
|
038c199c0a
|
cleanup and rename of files
|
2018-09-25 19:17:28 +02:00 |
|
|
eyck
|
3512206d77
|
Added hello world project
|
2018-09-25 18:58:24 +02:00 |
|
|
eyck
|
215767a724
|
Sync commit
|
2018-09-14 14:03:20 +02:00 |
|
|
eyck
|
250fa831d0
|
Initial version of riscv-bldc-forced-communication
|
2018-08-08 20:59:10 +02:00 |
|