adds TGC5L environment
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3403edcde9
commit
9dd7dcb4ce
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@ -1,12 +1,15 @@
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add_custom_target(fw-hello-world ALL
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COMMAND make -C ${riscvfw_SOURCE_DIR}/hello-world
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USES_TERMINAL
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WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
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add_custom_target(fw-dhrystone ALL
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COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/dhrystone
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USES_TERMINAL
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WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
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add_custom_target(fw-coremark ALL
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COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/coremark/cm PORT_DIR=../tgc
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USES_TERMINAL
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WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
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if (NOT DEFINED TARGET)
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set(TARGET iss)
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endif()
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add_custom_target(fw-hello-world ALL
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COMMAND make -C ${riscvfw_SOURCE_DIR}/hello-world BOARD=${TARGET}
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USES_TERMINAL
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WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
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add_custom_target(fw-dhrystone ALL
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COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/dhrystone BOARD=${TARGET}
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USES_TERMINAL
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WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
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add_custom_target(fw-coremark ALL
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COMMAND make -C ${riscvfw_SOURCE_DIR}/benchmarks/coremark/cm PORT_DIR=../tgc BOARD=${TARGET}
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USES_TERMINAL
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WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR})
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@ -0,0 +1 @@
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/*.o
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@ -0,0 +1,121 @@
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#include <stdint.h>
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#include <stdio.h>
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#include <unistd.h>
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#include "platform.h"
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#include "encoding.h"
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extern int main(int argc, char** argv);
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extern void trap_entry();
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static unsigned long mtime_lo(void)
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{
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unsigned long ret;
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__asm volatile("rdtime %0":"=r"(ret));
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return ret;
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}
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#if __riscv_xlen==32
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static uint32_t mtime_hi(void)
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{
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unsigned long ret;
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__asm volatile("rdtimeh %0":"=r"(ret));
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return ret;
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}
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uint64_t get_timer_value()
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{
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while (1) {
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uint32_t hi = mtime_hi();
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uint32_t lo = mtime_lo();
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if (hi == mtime_hi())
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return ((uint64_t)hi << 32) | lo;
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}
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}
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#elif __riscv_xlen==64
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uint64_t get_timer_value()
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{
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return mtime_lo();
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}
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#endif
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unsigned long get_timer_freq()
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{
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return 32768;
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}
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unsigned long get_cpu_freq()
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{
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return 10000000;
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}
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void init_pll(void){
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}
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#ifdef USE_PLIC
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extern void handle_m_ext_interrupt();
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#endif
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#ifdef USE_M_TIME
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extern void handle_m_time_interrupt();
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#endif
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uintptr_t handle_trap(uintptr_t mcause, uintptr_t epc)
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{
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if (0){
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#ifdef USE_PLIC
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// External Machine-Level interrupt from PLIC
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} else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_EXT)) {
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handle_m_ext_interrupt();
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#endif
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#ifdef USE_M_TIME
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// External Machine-Level interrupt from PLIC
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} else if ((mcause & MCAUSE_INT) && ((mcause & MCAUSE_CAUSE) == IRQ_M_TIMER)){
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handle_m_time_interrupt();
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#endif
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}
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else {
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char* result = "trap 0\n";
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result[5]=(mcause&0xff)+'0';
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//write(1, "trap\n", 5);
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write(1, result, 7);
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_exit(1 + mcause);
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}
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return epc;
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}
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void _init()
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{
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#ifndef NO_INIT
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init_pll();
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printf("core freq at %d Hz\n", get_cpu_freq());
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write_csr(mtvec, &trap_entry);
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if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
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write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
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write_csr(fcsr, 0); // initialize rounding mode, undefined at reset
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}
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#endif
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}
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void _fini()
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{
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}
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int is_uart_ready(int uart_id){
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return 1;
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}
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int try_write_uart_char(int uart_id, char c){
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*((char*)0x10000000) = c;
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return 1;
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}
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void write_uart_char(int uart_id, char c){
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*((char*)0x10000000) = c;
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}
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@ -0,0 +1,174 @@
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OUTPUT_ARCH( "riscv" )
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ENTRY( _start )
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MEMORY
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{
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flash (rxai!w) : ORIGIN = 0x80000000, LENGTH = 64k
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ram (wxa!ri) : ORIGIN = 0x80010000, LENGTH = 64k
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}
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PHDRS
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{
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flash PT_LOAD;
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ram_init PT_LOAD;
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ram PT_NULL;
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}
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SECTIONS
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{
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__stack_size = DEFINED(__stack_size) ? __stack_size : 2K;
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.init ORIGIN(flash) :
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{
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KEEP (*(SORT_NONE(.init)))
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} >flash AT>flash :flash
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.text :
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{
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*(.text.unlikely .text.unlikely.*)
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*(.text.startup .text.startup.*)
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*(.text .text.*)
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*(.gnu.linkonce.t.*)
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} >flash AT>flash :flash
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.fini :
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{
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KEEP (*(SORT_NONE(.fini)))
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} >flash AT>flash :flash
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PROVIDE (__etext = .);
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PROVIDE (_etext = .);
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PROVIDE (etext = .);
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.rodata :
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{
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*(.rdata)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.r.*)
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} >flash AT>flash :flash
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. = ALIGN(4);
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >flash AT>flash :flash
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
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KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >flash AT>flash :flash
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
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KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >flash AT>flash :flash
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.ctors :
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{
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/* gcc uses crtbegin.o to find the start of
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the constructors, so we make sure it is
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first. Because this is a wildcard, it
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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is in. */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*crtbegin?.o(.ctors))
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/* We don't want to include the .ctor section from
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the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last */
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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} >flash AT>flash :flash
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.dtors :
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{
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KEEP (*crtbegin.o(.dtors))
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KEEP (*crtbegin?.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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} >flash AT>flash :flash
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.lalign :
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{
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. = ALIGN(4);
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PROVIDE( _data_lma = . );
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} >flash AT>flash :flash
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.dalign :
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{
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. = ALIGN(4);
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PROVIDE( _data = . );
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} >ram AT>flash :ram_init
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.data :
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{
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__DATA_BEGIN__ = .;
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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} >ram AT>flash :ram_init
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.srodata :
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{
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PROVIDE( _gp = . + 0x800 );
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*(.srodata.cst16)
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*(.srodata.cst8)
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*(.srodata.cst4)
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*(.srodata.cst2)
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*(.srodata .srodata.*)
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} >ram AT>flash :ram_init
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.sdata :
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{
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__SDATA_BEGIN__ = .;
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*(.sdata .sdata.*)
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*(.gnu.linkonce.s.*)
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} >ram AT>flash :ram_init
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. = ALIGN(4);
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PROVIDE( _edata = . );
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PROVIDE( edata = . );
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PROVIDE( _fbss = . );
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PROVIDE( __bss_start = . );
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.bss :
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{
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*(.sbss*)
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*(.gnu.linkonce.sb.*)
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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} >ram AT>ram :ram
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. = ALIGN(8);
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__BSS_END__ = .;
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__global_pointer$ = MIN(__SDATA_BEGIN__ + 0x800, MAX(__DATA_BEGIN__ + 0x800, __BSS_END__ - 0x800));
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PROVIDE( _end = . );
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PROVIDE( end = . );
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.stack ORIGIN(ram) + LENGTH(ram) - __stack_size :
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{
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PROVIDE( _heap_end = . );
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. = __stack_size;
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PROVIDE( _sp = . );
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} >ram AT>ram :ram
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PROVIDE( tohost = 0xfffffff0 );
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PROVIDE( fromhost = 0xfffffff8 );
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}
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@ -0,0 +1,32 @@
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// See LICENSE for license details.
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#ifndef _ISS_PLATFORM_H
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#define _ISS_PLATFORM_H
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// Some things missing from the official encoding.h
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#define MCAUSE_INT 0x80000000
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#define MCAUSE_CAUSE 0x7FFFFFFF
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#include "rtl/const.h"
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/****************************************************************************
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* Platform definitions
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*****************************************************************************/
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#define MEM_BASE_ADDR _AC(0x00000000,UL)
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// Helper functions
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#define _REG32(p, i) (*(volatile uint32_t *) ((p) + (i)))
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#define _REG32P(p, i) ((volatile uint32_t *) ((p) + (i)))
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// Misc
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#include <stdint.h>
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void init_pll(void);
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unsigned long get_cpu_freq(void);
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unsigned long get_timer_freq(void);
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uint64_t get_timer_value(void);
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int is_uart_ready(int uart_id);
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int try_write_uart_char(int uart_id, char);
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void write_uart_char(int uart_id, char);
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#endif /* _ISS_PLATFORM_H */
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