Firmware/MNRS-BM-BSP
7
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

fixes for ehrenberg platform, minres peripheral functions and nanolib

Browse Source
This commit is contained in:
Eyck Jentzsch 2024-03-02 12:18:38 +01:00
parent 96fa7db587
commit 6523206738
4 changed files with 36 additions and 31 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
env/ehrenberg/init.c vendored
View File

@ -5,16 +5,9 @@
#include "platform.h"
#include "encoding.h"
#if __riscv_xlen == 32
#define MCAUSE_INT 0x80000000UL
#define MCAUSE_CAUSE 0x000003FFUL
#else
#define MCAUSE_INT 0x8000000000000000UL
#define MCAUSE_CAUSE 0x00000000000003FFUL
#endif
extern int main(int argc, char** argv);
extern void trap_entry();
extern void trap_entry(void);
#define IRQ_M_SOFT 3
#define IRQ_M_TIMER 7
#define IRQ_M_EXT 11
@ -48,7 +41,7 @@ static uint32_t mtime_hi(void)
return ret;
}
uint64_t get_timer_value()
uint64_t get_timer_value(void)
{
while (1) {
uint32_t hi = mtime_hi();
@ -118,7 +111,7 @@ void _init()
#ifndef NO_INIT
init_pll();
uart_init(115200);
printf("core freq at %d Hz\n", get_cpu_freq());
printf("core freq at %lu Hz\n", get_cpu_freq());
write_csr(mtvec, &trap_entry);
if (read_csr(misa) & (1 << ('F' - 'A'))) { // if F extension is present
write_csr(mstatus, MSTATUS_FS); // allow FPU instructions without trapping
@ -133,6 +126,6 @@ void _init()
}
void _fini()
void _fini(void)
{
}

10
env/ehrenberg/platform.h vendored
View File

@ -3,9 +3,13 @@
#ifndef _ISS_PLATFORM_H
#define _ISS_PLATFORM_H
// Some things missing from the official encoding.h
#define MCAUSE_INT 0x80000000
#define MCAUSE_CAUSE 0x7FFFFFFF
#if __riscv_xlen == 32
#define MCAUSE_INT 0x80000000UL
#define MCAUSE_CAUSE 0x000003FFUL
#else
#define MCAUSE_INT 0x8000000000000000UL
#define MCAUSE_CAUSE 0x00000000000003FFUL
#endif
#define APB_BUS

30
include/ehrenberg/devices/qspi.h
View File

@ -27,11 +27,11 @@ typedef struct {
#define SPI_STATUS_RSP_INT_FLAG = (1 << 9)
static inline void spi_configure(volatile qspi_t* reg, spi_cfg *config){
reg->config = (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4);
reg->clk_divider = config->clkDivider;
reg->ss_setup = config->ssSetup;
reg->ss_hold = config->ssHold;
reg->ss_disable =config->ssDisable;
reg->CONFIG = (config->cpol << 0) | (config->cpha << 1) | (config->mode << 4);
reg->SCLK_CONFIG = config->clkDivider;
reg->SSGEN_SETUP = config->ssSetup;
reg->SSGEN_HOLD = config->ssHold;
reg->SSGEN_DISABLE = config->ssDisable;
}
static inline void spi_init(volatile qspi_t* spi){
@ -47,41 +47,41 @@ static inline void spi_init(volatile qspi_t* spi){
}
static inline uint32_t spi_cmd_avail(volatile qspi_t* reg){
return reg->status & 0xFFFF;
return reg->STATUS & 0xFFFF;
}
static inline uint32_t spi_rsp_occupied(volatile qspi_t* reg){
return reg->status >> 16;
return reg->STATUS >> 16;
}
static inline void spi_write(volatile qspi_t* reg, uint8_t data){
while(spi_cmd_avail(reg) == 0);
reg->data = data | SPI_CMD_WRITE;
reg->DATA = data | SPI_CMD_WRITE;
}
static inline uint8_t spi_write_read(volatile qspi_t* reg, uint8_t data){
while(spi_cmd_avail(reg) == 0);
reg->data = data | SPI_CMD_READ | SPI_CMD_WRITE;
reg->DATA = data | SPI_CMD_READ | SPI_CMD_WRITE;
while(spi_rsp_occupied(reg) == 0);
return reg->data;
return reg->DATA;
}
static inline uint8_t spi_read(volatile qspi_t* reg){
while(spi_cmd_avail(reg) == 0);
reg->data = SPI_CMD_READ;
reg->DATA = SPI_CMD_READ;
while(spi_rsp_occupied(reg) == 0);
while((reg->data & 0x80000000)==0);
return reg->data;
while((reg->DATA & 0x80000000)==0);
return reg->DATA;
}
static inline void spi_select(volatile qspi_t* reg, uint32_t slaveId){
while(spi_cmd_avail(reg) == 0);
reg->data = slaveId | 0x80 | SPI_CMD_SS;
reg->DATA = slaveId | 0x80 | SPI_CMD_SS;
}
static inline void spi_deselect(volatile qspi_t* reg, uint32_t slaveId){
while(spi_cmd_avail(reg) == 0);
reg->data = slaveId | SPI_CMD_SS;
reg->DATA = slaveId | SPI_CMD_SS;
}
static inline void spi_wait_tx_idle(volatile qspi_t* reg){

12
include/ehrenberg/devices/uart.h
View File

@ -6,12 +6,20 @@
#define uart_t apb3uart_t
static void uart_write(volatile uart_t *reg, uint8_t data){
static inline uint32_t uart_get_tx_free(volatile uart_t *reg){
return (reg->STATUS_REG >> 16) & 0xFF;
}
static inline uint32_t uart_get_rx_avail(volatile uart_t *reg){
return reg->STATUS_REG >> 24;
}
static inline void uart_write(volatile uart_t *reg, uint8_t data){
while(get_uart_rx_tx_reg_tx_free(reg) == 0);
set_uart_rx_tx_reg_data(reg, data);
}
static inline uint8_t uart_read(volatile uart_t *reg){
static inline inline uint8_t uart_read(volatile uart_t *reg){
uint32_t res = get_uart_rx_tx_reg_data(reg);
while((res&0x10000) == 0) res = get_uart_rx_tx_reg_data(reg);
return res;