 Eyck-Alexander Jentzsch
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633c0d21a0
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2023-09-20 15:17:43 +02:00 |
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Eyck-Alexander Jentzsch
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51f6fbe0dd
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applies newest CoreDSL changes
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2023-09-20 15:12:03 +02:00 |
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Eyck-Alexander Jentzsch
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de45d06878
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adds initial working version of llvm backend
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2023-09-19 16:26:07 +02:00 |
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Eyck-Alexander Jentzsch
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b360fc2c75
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2023-09-05 10:08:49 +02:00 |
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Eyck-Alexander Jentzsch
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e21f8dc379
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allows functions in interp and updates generated
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2023-09-05 10:08:00 +02:00 |
 Eyck Jentzsch
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8ee3ac90f7
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adapts name changes
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2023-09-04 12:45:45 +02:00 |
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Eyck Jentzsch
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b5d915f389
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fixes compile issues from merge
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2023-08-30 15:49:28 +02:00 |
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Eyck Jentzsch
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813b40409d
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Merge branch 'develop' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into develop
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2023-08-30 10:05:42 +02:00 |
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Eyck Jentzsch
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c8a4a4c736
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renames core(s)
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2023-08-28 07:09:55 +02:00 |
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Eyck Jentzsch
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20e920338c
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removes v2p function
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2023-08-04 13:08:10 +02:00 |
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Eyck Jentzsch
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e151416f58
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fixes systemc factory registration
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2023-07-31 12:55:09 +02:00 |
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Eyck Jentzsch
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24de2bbdf5
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purge build system
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2023-07-30 13:55:57 +02:00 |
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Eyck Jentzsch
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e68f9c573f
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Merge branch 'develop' of
https://git.minres.com/DBT-RISE/DBT-RISE-TGC.git into develop
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2023-07-30 09:14:58 +02:00 |
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Eyck Jentzsch
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f38cc7d8b9
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updates LLVM build
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2023-07-29 17:55:37 +02:00 |
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Eyck-Alexander Jentzsch
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7af7e040da
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2023-07-29 11:47:25 +02:00 |
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Eyck-Alexander Jentzsch
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6e52af168b
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adds faster decoding to tcc and cleans up others
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2023-07-29 11:42:46 +02:00 |
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Eyck-Alexander Jentzsch
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bd0d15f3a2
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updates template for faster instruction decoding
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2023-07-23 08:10:57 +02:00 |
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Eyck-Alexander Jentzsch
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c78026b720
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adds faster instruction decoding
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2023-07-23 08:05:15 +02:00 |
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Eyck Jentzsch
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a0ca3cdfa5
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revive LLVM support (WIP)
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2023-07-14 12:55:34 +02:00 |
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Eyck Jentzsch
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720236ec3f
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add generated core registration
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2023-07-14 12:51:51 +02:00 |
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Eyck Jentzsch
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957145ca84
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add SystemC ISS factory
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2023-07-14 11:11:03 +02:00 |
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Eyck Jentzsch
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0b719a4b57
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fixes literal type
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2023-07-10 20:39:02 +02:00 |
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Eyck Jentzsch
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b4b03f7850
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fixes build system to handle TCC properly
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2023-07-09 22:20:50 +02:00 |
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Eyck Jentzsch
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145a0cf68b
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updates registration of cores for sysc
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2023-07-09 20:24:45 +02:00 |
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Eyck Jentzsch
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1cef7de8c7
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fixes missing namespaces
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2023-07-09 20:16:16 +02:00 |
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Eyck Jentzsch
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e95f422aab
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cleans vm implementation up
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2023-07-09 20:13:26 +02:00 |
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Eyck Jentzsch
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250ea3c980
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extends factory to support SystemC core wrapper
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2023-07-09 18:19:59 +02:00 |
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Eyck-Alexander Jentzsch
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7b31b8ca8e
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adds updated generated files
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2023-07-09 16:58:47 +02:00 |
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Eyck-Alexander Jentzsch
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91a23a4a18
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2023-07-09 16:55:06 +02:00 |
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Eyck Jentzsch
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a32c83e1be
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fixes CLI handling of plugin paramters in ISS
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2023-07-05 08:32:05 +02:00 |
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Eyck-Alexander Jentzsch
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87b4082633
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Merge branch 'tmp' into develop
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2023-07-03 14:22:50 +02:00 |
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Eyck Jentzsch
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4dbc7433a5
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fixes cause CSR handling
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2023-06-12 17:38:56 +02:00 |
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Eyck Jentzsch
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99a9970ddd
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fixes sysc compile issues
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2023-06-12 09:58:24 +02:00 |
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Eyck Jentzsch
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0b5de90fb1
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changes [m|u]cause rd/wr handling
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2023-06-11 18:29:58 +02:00 |
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Eyck-Alexander Jentzsch
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15cd36dcd4
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adds fix for compressed instructions and reads
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2023-06-05 17:57:38 +02:00 |
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Eyck-Alexander Jentzsch
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2281ec4144
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corrects errors and adds new backend and
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2023-06-05 15:18:27 +02:00 |
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Eyck-Alexander Jentzsch
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11c481cec2
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adds verbosity to error
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2023-06-05 15:17:16 +02:00 |
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Eyck Jentzsch
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60d07f2eb6
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changes default loglevel to info for tgc-sim
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2023-06-01 06:55:21 +02:00 |
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Eyck Jentzsch
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a123beb301
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fixes duplicate variable declaration and templates
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2023-05-27 10:20:49 +02:00 |
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Eyck Jentzsch
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ee6218279e
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adapts to latest code gen changes
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2023-05-25 12:52:30 +02:00 |
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Eyck-Alexander Jentzsch
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6ed7eafc5d
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adds inital version of tcc backend
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2023-05-16 21:51:35 +02:00 |
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Eyck Jentzsch
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32848ec396
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fixes build system and typo in wt_cache
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2023-05-13 16:57:01 +02:00 |
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Eyck Jentzsch
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6789cf4c32
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fixes case of unavailable backend
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2023-05-12 15:45:53 +02:00 |
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Eyck Jentzsch
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afdf8fb97f
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adds missing namespaces
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2023-05-11 23:11:04 +02:00 |
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Eyck Jentzsch
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cfa7b72363
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changes time handling at sockets
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2023-05-06 19:57:29 +02:00 |
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Eyck Jentzsch
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d330307ed5
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splits bus into 2 sockets for i/dbus
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2023-05-04 21:59:31 +02:00 |
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Eyck Jentzsch
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aa70d8a54a
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fixes CLIC to match clicinfo description in CLIC spec 11.04.2023
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2023-05-02 17:22:13 +02:00 |
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Eyck Jentzsch
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b493745cd7
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sets reset start time to 0
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2023-05-02 11:21:42 +02:00 |
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Eyck Jentzsch
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f9e8e1d857
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fixes core_complex wrt. tlm quantum and DMI
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2023-05-02 11:13:25 +02:00 |
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Eyck Jentzsch
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d990f1cf5d
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fixes reading of 64bit CSR register
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2023-05-01 22:23:35 +02:00 |