DBT-RISE
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DBT-RISE-TGC
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358 Commits

Author SHA1 Message Date
Eyck Jentzsch de79adc50d updates debugger hook to stop before fetching instructions 
this relates to https://github.com/Minres/DBT-RISE-RISCV/issues/8 :
Debugger loses control when trap vector fetch fails

and https://github.com/Minres/DBT-RISE-RISCV/issues/7 : Two debugger
single-steps are required at reset vector
 2024-08-17 12:39:54 +02:00
Eyck Jentzsch 0473aa5344 fixes SystemC wrapper wrt. templated core_complex 2024-08-17 12:34:17 +02:00
Eyck-Alexander Jentzsch a45fcd28db updates fn calling generation 2024-08-17 08:22:04 +02:00
Eyck-Alexander Jentzsch 0f15032210 removes gen_wait as wait can be called like any other extern function 2024-08-14 15:25:06 +02:00
Eyck-Alexander Jentzsch efc11d87a5 updates template with fcsr check, adds extra braces on If Statements 2024-08-14 14:32:58 +02:00
Eyck-Alexander Jentzsch 4a19e27926 adds changes due to generator being more inline with others 2024-08-14 13:52:08 +02:00
Eyck-Alexander Jentzsch c15cdb0955 expands return values of jit creating functions to inhibit endless trapping 2024-08-14 11:49:59 +02:00
Eyck-Alexander Jentzsch 6609d12582 adds flimit that gets properly evaluated in interp 2024-08-13 15:22:34 +02:00
Eyck-Alexander Jentzsch b5341700aa updates template and adds braces when using conditions 2024-08-13 08:55:14 +02:00
Eyck-Alexander Jentzsch fbca690b3b replaces gen_wait, updates template to include fp_functions when necessary 2024-08-08 12:57:08 +02:00
Eyck-Alexander Jentzsch 235a7e6e24 updates template 2024-08-08 11:08:28 +02:00
Eyck-Alexander Jentzsch 62d21e1156 updates disass 2024-08-07 09:21:07 +02:00
Eyck Jentzsch c28e8fd00c removes left-overs 2024-08-04 18:57:20 +02:00
Eyck Jentzsch b3cc9d2346 makes core_complex a template 2024-08-04 18:47:32 +02:00
Eyck Jentzsch 933f08494c removes C++17 dependency from asmjit backend 2024-08-04 17:41:49 +02:00
Eyck Jentzsch 21f8eab432 adds regenerated tgc5c 2024-08-02 19:18:28 +02:00
Eyck Jentzsch 6ddb8da07f fixes missing rename 2024-08-02 11:58:51 +02:00
Eyck Jentzsch edf456c59f fixes missing braces 2024-08-02 10:33:15 +02:00
Eyck Jentzsch 42efced1eb fixes FCSR behavior if no floating point is implemented 2024-08-02 08:59:22 +02:00
Eyck-Alexander Jentzsch f579ec6e48 changes access to rounding mode to fail explicitly instead of unintended behavior 2024-07-31 12:30:41 +02:00
Eyck-Alexander Jentzsch fd20e66f1f changes softfloat API usage, all effected Instrs pass test suite 2024-07-31 12:30:41 +02:00
Eyck-Alexander Jentzsch 7ffa7667b6 fixes concerning FMADD_S, FMSUB_S, FNMADD_S, and FNSUB_S 
mostly about ensuring correct sign
 2024-07-31 12:30:41 +02:00
Eyck-Alexander Jentzsch 39d2518fdd checkin: tgc5f builds and runs through 2024-07-31 12:30:41 +02:00
Stanislaw Kaushanski a365110054 fix format 2024-07-30 13:34:23 +02:00
Eyck Jentzsch d2efb23ff7 fixes cache behavior for fetches 2024-07-25 19:33:50 +02:00
Eyck-Alexander Jentzsch 72b11beac5 moves decoder to dbt-rise-core 2024-07-25 10:13:38 +02:00
Eyck Jentzsch e87b7d5fd0 applies clang-format 2024-07-24 14:48:50 +02:00
Eyck Jentzsch 5a2b96ef3e adds logging categories for ISS 2024-07-24 12:30:07 +02:00
Eyck-Alexander Jentzsch c6b99cd155 introduces new decoder to interp backend 2024-07-24 12:28:35 +02:00
Eyck-Alexander Jentzsch b1306c3a47 improves instruction decoding by avoiding copying, replaces .size() 2024-07-24 08:54:37 +02:00
Eyck-Alexander Jentzsch 0d6bf924ed changes jh.globals from map to vector 2024-07-23 15:45:51 +02:00
Eyck-Alexander Jentzsch 86de536c8f changes jh globals to seperate riscv specifics 2024-07-23 14:35:31 +02:00
Eyck-Alexander Jentzsch 051dd5e2d3 updates templates for decoder in seperate class, adds again generated templates 2024-07-23 13:46:10 +02:00
Eyck-Alexander Jentzsch e3942be776 Introduces decoder in a seperate class 2024-07-23 13:08:53 +02:00
Eyck-Alexander Jentzsch 6ee484a771 moves instruction decoder into own class 2024-07-23 11:30:33 +02:00
Eyck-Alexander Jentzsch 60808c8649 corrects template since util fns are no longer vm_base members 2024-07-23 11:29:56 +02:00
Eyck-Alexander Jentzsch 0432803d82 updates templates and vm impls for better LAST_BRANCH handling 2024-07-22 09:04:17 +02:00
Eyck-Alexander Jentzsch d42d2ce533 corrects illegal instruction for llvm 2024-07-18 14:04:23 +02:00
Eyck-Alexander Jentzsch 236d12d7f5 integrates gen_bool for Conditions (was truncation) into llvm 2024-07-18 13:30:42 +02:00
Eyck-Alexander Jentzsch e1b6cab890 removes setting of NEXT_PC to max when trapping in llvm and asmjit, adds default disass to llvm 2024-07-18 12:02:40 +02:00
Eyck-Alexander Jentzsch 8361f88718 removes setting of NEXT_PC to max if trap 2024-07-18 11:37:53 +02:00
Eyck-Alexander Jentzsch 2ec7ea4b41 removes leftover gen_sync in asmjit 2024-07-17 22:39:12 +02:00
Eyck-Alexander Jentzsch b24965d321 corrects gen_sync update order, improves illegal instruction 2024-07-17 20:52:01 +02:00
Eyck-Alexander Jentzsch 244bf6d2f2 corrects gen_sync before trap check, improves illegal_instruction 2024-07-17 20:25:49 +02:00
Eyck-Alexander Jentzsch 1a4465a371 changes template: adds correct illegal instruction, reorders gen_sync to allow correct instr id eve when trapping, adds newly generated vm 2024-07-17 19:59:01 +02:00
Eyck-Alexander Jentzsch 11a30caae8 integrates generator changes to canPrecompute 2024-07-17 15:14:13 +02:00
Eyck-Alexander Jentzsch ac1a26a10c integrates new tval changes into llvm 2024-07-17 14:17:02 +02:00
Eyck-Alexander Jentzsch 7a199e122d integrates new tval changes into asmjit 2024-07-17 09:42:12 +02:00
Eyck-Alexander Jentzsch d8c3d2e19c integrates new tval changes into tcc 2024-07-16 17:35:23 +02:00
Eyck-Alexander Jentzsch 375755999a integrates new tval changes 2024-07-16 15:32:35 +02:00