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ce5b2e60b9
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amends template to fix branching instructions
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2023-05-22 17:00:36 +02:00 |
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6ed7eafc5d
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adds inital version of tcc backend
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2023-05-16 21:51:35 +02:00 |
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ee2ded931d
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adds remaining register offsets
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2023-05-14 17:16:42 +02:00 |
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95ba5c901a
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re-introduces last_branch register
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2023-05-14 17:00:37 +02:00 |
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00b0f101ac
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adapts to changes of instrumentation interface in dbt-rise-core
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2023-04-28 20:38:07 +02:00 |
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d881cb6e63
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fix data width of generated code
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2023-03-26 12:12:34 +02:00 |
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207dbf1071
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fixes out of range access for register alias names
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2023-02-17 06:28:30 +01:00 |
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65dca13b42
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fixes WFI miss of interrupt
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2023-01-14 17:40:21 +01:00 |
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7113683ee0
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moves pending interrupt check before handling trap thus saving 1 cycle
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2022-10-15 10:47:35 +02:00 |
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00e02bf565
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adds support for different branch types in tracing
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2022-08-08 06:30:37 +02:00 |
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0833198d34
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aads missing windows compat firx to template
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2022-07-23 14:36:23 +02:00 |
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4876f18ba9
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adds windows compatibility fixes
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2022-07-18 11:43:42 +02:00 |
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feaa49d367
|
removes decoder again as there is some issue
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2022-06-20 00:39:11 +02:00 |
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18f33b4a68
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fixes ordering of instructions for decoding
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2022-06-19 16:52:29 +02:00 |
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f096b15dbd
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factors decoder into separate component
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2022-06-19 13:17:31 +02:00 |
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5d481eb79d
|
fix generation of non-exception code
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2022-05-30 22:04:16 +02:00 |
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52ed8b81a6
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fixed template to work with previous code generator
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2022-05-30 14:08:02 +02:00 |
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0c542d42aa
|
separate generated sources
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2022-05-21 12:48:28 +02:00 |
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df16378605
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update template for changed code generator
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2022-05-18 19:10:34 +02:00 |
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e88f309ea2
|
add lz4 compression to pctrace
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2022-05-07 17:22:06 +02:00 |
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9d9008a3a2
|
fix pointer mess
|
2022-04-26 15:35:17 +02:00 |
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a92b84bef4
|
add code word access for ISS plugins
|
2022-04-25 14:18:19 +02:00 |
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2e670c4d03
|
change interpreter structure
|
2022-03-06 15:11:38 +01:00 |
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521f40a3d6
|
refactored interpreter backend structure
|
2022-03-05 20:59:17 +01:00 |
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b8fa5fbbda
|
adapt to extended instrumentation interface
|
2022-02-09 21:01:17 +01:00 |
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68b5697c8f
|
Fix cycles JSON template
|
2022-02-01 21:48:56 +01:00 |
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059bd0d371
|
rework cycle estimation
|
2022-02-01 19:03:45 +01:00 |
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ef2a4df925
|
simplify spawn block handling
|
2022-01-31 23:40:31 +01:00 |
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3563ba80d0
|
add spawn blocks
|
2022-01-12 07:21:16 +01:00 |
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|
07d5af1dde
|
fix stand-alone ISS compilation to include all generated cores
|
2021-11-26 17:56:40 +01:00 |
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c42e336509
|
fix proper debug mode handling (#267 & #268)
|
2021-11-07 17:48:44 +01:00 |
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8b6e3abd23
|
fix hard-code arch in templates
|
2021-10-30 13:37:17 +02:00 |
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1616f0ac90
|
remove deprecated functions
|
2021-10-30 12:57:08 +02:00 |
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334d3fb296
|
adapt to SCC changes
|
2021-10-21 22:53:16 +02:00 |
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|
1d13c8196e
|
fix wrong PGMASK usage
|
2021-10-11 10:40:01 +02:00 |
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|
b17682e50e
|
fix YAML template
|
2021-10-01 23:49:04 +02:00 |
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6acf73a40f
|
add template to generate instruction YAML
|
2021-10-01 13:05:36 +02:00 |
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2f15d9676e
|
fix unaligned instr fetch behavior
|
2021-09-30 19:27:46 +02:00 |
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174259155d
|
add support for non-compressed ISA
|
2021-09-23 21:09:52 +02:00 |
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|
d95846a849
|
fix trap handling if illegal fetch (PMP) and U-mode CSRs
|
2021-08-01 17:23:22 +02:00 |
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|
e68918c2e8
|
fix instruction decode
|
2021-07-09 07:37:12 +02:00 |
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|
23b9741adf
|
refine and fix TGC_C iss to becoem compliant
|
2021-06-29 11:51:30 +02:00 |
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e432dd8208
|
fix handling of exceptions while accessing address spaces
|
2021-06-07 22:22:36 +02:00 |
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|
aaceecd5dc
|
fix mu_p platform features and CSRs
|
2021-05-17 09:20:09 +02:00 |
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32e4aa83b8
|
use extracted variables
|
2021-03-27 09:36:52 +00:00 |
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78c7064295
|
update groovy template to extract used registers
|
2021-03-26 08:24:45 +00:00 |
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b0bcb7febb
|
small fixes for robustness and readability
|
2021-03-22 22:47:30 +00:00 |
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4e0f20eba0
|
rework abort conditions
|
2021-03-17 19:32:57 +00:00 |
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80057eef32
|
fix RVC description bugs, remove paged fetch
|
2021-03-13 10:46:41 +00:00 |
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a6691bcd3c
|
update generated code with correct sign extension
|
2021-03-09 10:21:36 +00:00 |
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