 Eyck Jentzsch
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b8fa5fbbda
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adapt to extended instrumentation interface
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2022-02-09 21:01:17 +01:00 |
|
Eyck Jentzsch
|
09b0f0d0c8
|
fix cycle estimation plugin
|
2022-02-01 21:14:50 +01:00 |
 Eyck-Alexander Jentzsch
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ecc6091d1e
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cleans up source code to remove clang compiler warnings
|
2022-01-19 08:01:15 +01:00 |
|
Eyck Jentzsch
|
dd4c19a15c
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add option to configure number of irq
|
2021-12-01 12:56:36 +01:00 |
 Maribel Gomez
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86da31033c
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correct size usage in pmp addr checks
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2021-11-22 15:15:47 +01:00 |
|
Maribel Gomez
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974d103381
|
fix pmpcfg register write
|
2021-11-22 10:49:29 +01:00 |
|
Eyck Jentzsch
|
309758b994
|
fix clic_cfg access scheme
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2021-11-17 07:59:02 +01:00 |
|
Eyck Jentzsch
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d47375a70e
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fix ebreak CSR update
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2021-11-13 12:47:23 +01:00 |
|
Eyck Jentzsch
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43d7b99905
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revert pmp check implementation
|
2021-11-11 09:58:19 +01:00 |
|
Eyck Jentzsch
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2d7973520b
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fix mip handling
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2021-11-09 19:47:34 +01:00 |
|
Eyck Jentzsch
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fd98ad95f6
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rework PMP check and fix MISA for TGC_D
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2021-11-09 15:55:22 +01:00 |
|
Eyck Jentzsch
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bfa8166223
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fix wrong template class name
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2021-11-08 10:44:33 +01:00 |
|
Eyck Jentzsch
|
c42e336509
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fix proper debug mode handling (#267 & #268)
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2021-11-07 17:48:44 +01:00 |
|
Eyck Jentzsch
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49d09a05d7
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fix access rights to debug CSR register (#268)
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2021-11-07 16:45:10 +01:00 |
|
Eyck Jentzsch
|
459794b863
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add proper handling of store access fault (hart_mu_p)
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2021-11-06 13:29:11 +01:00 |
|
Eyck Jentzsch
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039746112b
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fix exception behavior
|
2021-11-02 15:10:20 +01:00 |
|
Eyck Jentzsch
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ac6d7ea5d4
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add debug feature to platform
|
2021-11-02 11:13:29 +01:00 |
|
Eyck Jentzsch
|
334d3fb296
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adapt to SCC changes
|
2021-10-21 22:53:16 +02:00 |
|
Eyck Jentzsch
|
d78fcc48e5
|
use marchid in platform
|
2021-09-30 19:27:03 +02:00 |
|
Eyck Jentzsch
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ba9339a50d
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fix MPP reset value, PMP inactive in U-mode handling and MRET in U-mode
|
2021-09-21 16:52:40 +02:00 |
|
Eyck Jentzsch
|
9c8b72693e
|
correct trap ids of access faults
|
2021-08-20 09:02:56 +02:00 |
|
Eyck Jentzsch
|
2f05083cf0
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fix elf loader and pmp check for debug accesses
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2021-08-19 10:50:25 +02:00 |
|
Eyck Jentzsch
|
836ba269e3
|
fix clic reset values
|
2021-08-16 15:05:05 +02:00 |
|
Eyck Jentzsch
|
adeffe47ad
|
fix behavior of riscv_hart_mu_p to match TGC_D
|
2021-08-12 20:34:10 +02:00 |
|
Eyck Jentzsch
|
d95846a849
|
fix trap handling if illegal fetch (PMP) and U-mode CSRs
|
2021-08-01 17:23:22 +02:00 |
|
Eyck Jentzsch
|
af887c286f
|
fix for #2
|
2021-07-28 09:09:08 +02:00 |
|
Eyck Jentzsch
|
d7bddd825c
|
add clic CSRs
|
2021-07-27 10:47:48 +02:00 |
|
Eyck Jentzsch
|
d0f3a120fd
|
fix naming in MU wrapper
|
2021-07-19 16:26:23 +02:00 |
|
Eyck Jentzsch
|
473f8a5a17
|
fix privilege behavior
|
2021-07-07 11:30:00 +02:00 |
|
Eyck Jentzsch
|
2f4b5bd9b2
|
fix detailed behavior of TGC_C
|
2021-07-06 21:19:36 +02:00 |
|
Eyck Jentzsch
|
23b9741adf
|
refine and fix TGC_C iss to becoem compliant
|
2021-06-29 11:51:30 +02:00 |
|
Eyck Jentzsch
|
5d8da08ce5
|
fix linker issue
the root cuase of the issue is the template paramter deduction which led
to the wrong template parameter.
|
2021-06-26 14:30:36 +02:00 |
|
Eyck Jentzsch
|
aaceecd5dc
|
fix mu_p platform features and CSRs
|
2021-05-17 09:20:09 +02:00 |
|
Eyck Jentzsch
|
a35974c9f5
|
make cpu type in core_complex configurable
|
2021-05-16 15:06:42 +02:00 |
|
Eyck Jentzsch
|
9c456ba8f2
|
initial version of MU hart
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2021-05-14 13:29:39 +02:00 |