|  | a6a6f51f0b | adds clang-format fixes | 2024-12-06 15:50:50 +01:00 |  | 
			
				
					|  | 21e1f791ad | corrects sysc integration template and corresponding file | 2024-12-06 09:49:02 +01:00 |  | 
			
				
					|  | be6f5791fa | adds update to cyclecount after each instr for asmjit | 2024-11-26 20:26:18 +01:00 |  | 
			
				
					|  | ac818f304d | increases verbosity incase elf loading goes wrong | 2024-10-21 16:42:58 +02:00 |  | 
			
				
					|  | ad60449073 | updates generated cores | 2024-09-27 20:04:58 +02:00 |  | 
			
				
					|  | 1fb7e8fcea | improves logging output | 2024-09-24 08:39:34 +02:00 |  | 
			
				
					|  | 5f9d0beafb | corrects softfloat to comply with RVD ACT | 2024-09-23 22:22:57 +02:00 |  | 
			
				
					|  | 4c0d1c75aa | adds addr formatting to logging | 2024-09-23 12:21:43 +02:00 |  | 
			
				
					|  | 2f3abf2f76 | adds namespaces for ELFIO | 2024-09-23 11:55:18 +02:00 |  | 
			
				
					|  | 62768bf81e | applies clang format | 2024-09-23 10:05:33 +02:00 |  | 
			
				
					|  | f6be8ec006 | adds elfio test utility | 2024-09-23 09:29:08 +02:00 |  | 
			
				
					|  | a8f56b6e27 | removes code dupication by unifying elf file read | 2024-09-23 09:28:27 +02:00 |  | 
			
				
					|  | 76ea0db25d | adds newest generated vm_impl | 2024-08-17 23:19:51 +02:00 |  | 
			
				
					|  | ec1b820c18 | fixes target xml generation | 2024-08-17 19:36:53 +02:00 |  | 
			
				
					|  | 64329cf0f6 | fixes use of icount vs. cycle | 2024-08-17 19:36:40 +02:00 |  | 
			
				
					|  | 9de0aed84d | expands some error message | 2024-08-17 16:55:49 +02:00 |  | 
			
				
					|  | bb4e2766d1 | applies clang-format | 2024-08-17 16:12:57 +02:00 |  | 
			
				
					|  | 0996d15bd4 | removes debug code | 2024-08-17 12:48:48 +02:00 |  | 
			
				
					|  | 6305efa7c2 | implements proper target XML generation incl. CSRs | 2024-08-17 12:40:40 +02:00 |  | 
			
				
					|  | de79adc50d | updates debugger hook to stop before fetching instructions this relates to https://github.com/Minres/DBT-RISE-RISCV/issues/8 :
Debugger loses control when trap vector fetch fails
and https://github.com/Minres/DBT-RISE-RISCV/issues/7 : Two debugger
single-steps are required at reset vector | 2024-08-17 12:39:54 +02:00 |  | 
			
				
					|  | 0473aa5344 | fixes SystemC wrapper wrt. templated core_complex | 2024-08-17 12:34:17 +02:00 |  | 
			
				
					|  | a45fcd28db | updates fn calling generation | 2024-08-17 08:22:04 +02:00 |  | 
			
				
					|  | 0f15032210 | removes gen_wait as wait can be called like any other extern function | 2024-08-14 15:25:06 +02:00 |  | 
			
				
					|  | efc11d87a5 | updates template with fcsr check, adds extra braces on If Statements | 2024-08-14 14:32:58 +02:00 |  | 
			
				
					|  | 4a19e27926 | adds changes due to generator being more inline with others | 2024-08-14 13:52:08 +02:00 |  | 
			
				
					|  | c15cdb0955 | expands return values of jit creating functions to inhibit endless trapping | 2024-08-14 11:49:59 +02:00 |  | 
			
				
					|  | 6609d12582 | adds flimit that gets properly evaluated in interp | 2024-08-13 15:22:34 +02:00 |  | 
			
				
					|  | b5341700aa | updates template and adds braces when using conditions | 2024-08-13 08:55:14 +02:00 |  | 
			
				
					|  | fbca690b3b | replaces gen_wait, updates template to include fp_functions when necessary | 2024-08-08 12:57:08 +02:00 |  | 
			
				
					|  | 235a7e6e24 | updates template | 2024-08-08 11:08:28 +02:00 |  | 
			
				
					|  | 62d21e1156 | updates disass | 2024-08-07 09:21:07 +02:00 |  | 
			
				
					|  | c28e8fd00c | removes left-overs | 2024-08-04 18:57:20 +02:00 |  | 
			
				
					|  | b3cc9d2346 | makes core_complex a template | 2024-08-04 18:47:32 +02:00 |  | 
			
				
					|  | 933f08494c | removes C++17 dependency from asmjit backend | 2024-08-04 17:41:49 +02:00 |  | 
			
				
					|  | 21f8eab432 | adds regenerated tgc5c | 2024-08-02 19:18:28 +02:00 |  | 
			
				
					|  | 6ddb8da07f | fixes missing rename | 2024-08-02 11:58:51 +02:00 |  | 
			
				
					|  | edf456c59f | fixes missing braces | 2024-08-02 10:33:15 +02:00 |  | 
			
				
					|  | 42efced1eb | fixes FCSR behavior if no floating point is implemented | 2024-08-02 08:59:22 +02:00 |  | 
			
				
					|  | f579ec6e48 | changes access to rounding mode to fail explicitly instead of unintended behavior | 2024-07-31 12:30:41 +02:00 |  | 
			
				
					|  | fd20e66f1f | changes softfloat API usage, all effected Instrs pass test suite | 2024-07-31 12:30:41 +02:00 |  | 
			
				
					|  | 7ffa7667b6 | fixes concerning FMADD_S, FMSUB_S, FNMADD_S, and FNSUB_S mostly about ensuring correct sign | 2024-07-31 12:30:41 +02:00 |  | 
			
				
					|  | 39d2518fdd | checkin: tgc5f builds and runs through | 2024-07-31 12:30:41 +02:00 |  | 
			
				
					|  | a365110054 | fix format | 2024-07-30 13:34:23 +02:00 |  | 
			
				
					|  | d2efb23ff7 | fixes cache behavior for fetches | 2024-07-25 19:33:50 +02:00 |  | 
			
				
					|  | 72b11beac5 | moves decoder to dbt-rise-core | 2024-07-25 10:13:38 +02:00 |  | 
			
				
					|  | e87b7d5fd0 | applies clang-format | 2024-07-24 14:48:50 +02:00 |  | 
			
				
					|  | 5a2b96ef3e | adds logging categories for ISS | 2024-07-24 12:30:07 +02:00 |  | 
			
				
					|  | c6b99cd155 | introduces new decoder to interp backend | 2024-07-24 12:28:35 +02:00 |  | 
			
				
					|  | b1306c3a47 | improves instruction decoding by avoiding copying, replaces .size() | 2024-07-24 08:54:37 +02:00 |  | 
			
				
					|  | 0d6bf924ed | changes jh.globals from map to vector | 2024-07-23 15:45:51 +02:00 |  |