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8f5d666b7d
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corrects mistake from rebasing, adds newly generated templates
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2025-03-31 12:50:05 +02:00 |
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e59458aa0e
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adds the missing vector csrs to the architectural state
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2025-03-31 10:18:51 +02:00 |
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4cef0f57c1
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updates templates and adds newly generated files
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2025-03-31 10:18:05 +02:00 |
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cbe4c2d62f
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adds comment to indicate purpose of arch state members
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2025-03-19 12:03:12 +01:00 |
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54233b448d
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moves mmu related code into mmu unit
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2025-03-16 08:50:01 +01:00 |
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53de21eef9
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adds generator changed output
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2025-02-12 20:45:04 +01:00 |
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be0f783af8
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adds cycle increment to tcc
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2024-12-28 13:06:46 +01:00 |
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1089800682
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updates vm_impls and core.h to work with new vm_base
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2024-12-28 08:24:09 +01:00 |
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21f8eab432
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adds regenerated tgc5c
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2024-08-02 19:18:28 +02:00 |
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149b3136d2
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updates generated files
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2024-07-10 12:55:36 +02:00 |
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b2cbf90d0b
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updates generated files
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2024-07-10 12:51:59 +02:00 |
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4cfb15c7cd
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Asmjit and interp working
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2024-07-10 12:51:31 +02:00 |
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8460f4ab7f
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updates templates to re-enable interactive debugging of generator
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2024-06-21 10:46:11 +02:00 |
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3fd51cc68c
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fixes templates
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2024-06-14 19:54:33 +02:00 |
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f0a004be9d
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adds information for debugging
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2024-05-09 13:42:16 +02:00 |
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119d4a8b43
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adds generation if IMEM space
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2024-02-21 07:08:24 +01:00 |
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fe2d5cb2f9
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adds semihosting to all backends
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2024-01-10 11:47:12 +01:00 |
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207f778ee6
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adds initial semihosting host capabilities
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2024-01-08 17:17:59 +01:00 |
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e6aa6e5842
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adds handling of variable number of clic interrupts
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2023-11-22 11:47:31 +01:00 |
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e48597b2b7
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adds formatting fixes
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2023-11-05 17:19:43 +01:00 |
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759061b569
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applies clang-format changes
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2023-10-29 17:06:56 +01:00 |
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633c0d21a0
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Merge branch 'develop' of https://git.minres.com/DBT-RISE/DBT-RISE-TGC into develop
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2023-09-20 15:17:43 +02:00 |
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51f6fbe0dd
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applies newest CoreDSL changes
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2023-09-20 15:12:03 +02:00 |
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b5d915f389
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fixes compile issues from merge
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2023-08-30 15:49:28 +02:00 |
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c8a4a4c736
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renames core(s)
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2023-08-28 07:09:55 +02:00 |
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