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aa70d8a54a
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fixes CLIC to match clicinfo description in CLIC spec 11.04.2023
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2023-05-02 17:22:13 +02:00 |
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d990f1cf5d
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fixes reading of 64bit CSR register
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2023-05-01 22:23:35 +02:00 |
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1672b01e62
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adds WT cache functionality as mixin
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2023-04-28 20:38:07 +02:00 |
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00b0f101ac
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adapts to changes of instrumentation interface in dbt-rise-core
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2023-04-28 20:38:07 +02:00 |
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f626ee2684
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fixes privilege wrapper for M/U to cope with 64bit
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2023-04-05 15:38:25 +02:00 |
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98dd329833
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fixes CSR access rights
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2023-04-04 09:23:08 +02:00 |
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6213445bc4
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fixes 64bit behavior of CSR regs
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2023-03-27 12:04:43 +02:00 |
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2e4faa4d50
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fixes mstatus mask
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2023-03-25 09:14:56 +01:00 |
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8e1951f298
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adds 64bit mstatus
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2023-03-23 07:47:21 +01:00 |
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7efa924510
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fixes m/uintstatus read
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2023-03-17 10:51:39 +01:00 |
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febbc4fff0
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fixes m/uintstatus read
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2023-03-17 10:23:05 +01:00 |
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39b2788b7e
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implements and fixes CLIC CSR behavior
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2023-03-17 09:09:09 +01:00 |
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a943dd3bdf
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fixes wrong array size which led to unintended CSR definitions
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2023-03-15 14:16:08 +01:00 |
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fedbff5971
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fixes xcause and u-mode clic CSRs
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2023-03-15 12:27:39 +01:00 |
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c2758e8321
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removes mscratchcsw from CLIC feature
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2023-03-15 09:07:00 +01:00 |
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8be5fe71df
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fixes template name typo
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2023-03-12 07:42:09 +01:00 |
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3f7ce41b9d
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fixes CLIC mtvt register behavior
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2023-03-11 14:03:03 +01:00 |
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ad1cbedf00
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adds back missing max irq functions
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2023-03-11 12:47:10 +01:00 |
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83f54b5074
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fixes CLICCFG settings
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2023-03-11 08:48:03 +01:00 |
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a83928fd8c
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fixes CSR/CLIC implementation
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2023-03-10 20:40:21 +01:00 |
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62c118e501
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fixes CSR to match latest fast interrupts spec
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2023-01-20 16:21:04 +01:00 |
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1a0fc4bd5d
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fixes wrong mcounteren in M-mode only priv wrapper
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2022-10-10 08:59:27 +02:00 |
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40d1966e9a
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fixes pending irq within irq hander behavior
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2022-10-08 11:20:52 +02:00 |
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a977200284
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cleans up priv wrappers
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2022-10-05 08:58:57 +02:00 |
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6ba7c82f80
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fixes wrapper definitions for hwl cores
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2022-09-26 13:31:46 +02:00 |
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ad7bb28b4c
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fixes write mask of clic memory mapped registers
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2022-09-17 12:15:19 +02:00 |
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1ad66a71d8
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extends supported break point types
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2022-08-06 09:53:24 +02:00 |
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e60fa3d5e6
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adaptes to changes in dbt-rise-core
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2022-08-06 09:49:32 +02:00 |
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57347ae4d9
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fixes cppcheck flagged issues
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2022-07-23 13:49:10 +02:00 |
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4876f18ba9
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adds windows compatibility fixes
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2022-07-18 11:43:42 +02:00 |
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12ccfc055a
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updates generate tgc_c definition
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2022-07-11 22:58:10 +02:00 |
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feaa49d367
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removes decoder again as there is some issue
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2022-06-20 00:39:11 +02:00 |
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f096b15dbd
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factors decoder into separate component
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2022-06-19 13:17:31 +02:00 |
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076b5a39ad
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fix class naming
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2022-06-02 08:30:49 +02:00 |
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f40ab41899
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fix left-over from layout refactoring
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2022-06-02 08:30:02 +02:00 |
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0703a0a845
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update tgc-mapper
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2022-05-30 07:45:32 +02:00 |
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0c542d42aa
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separate generated sources
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2022-05-21 12:48:28 +02:00 |
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966d1616c5
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change source code to unified layout
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2022-05-21 11:55:24 +02:00 |
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9d9008a3a2
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fix pointer mess
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2022-04-26 15:35:17 +02:00 |
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a92b84bef4
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add code word access for ISS plugins
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2022-04-25 14:18:19 +02:00 |
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c42e336509
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fix proper debug mode handling (#267 & #268)
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2021-11-07 17:48:44 +01:00 |
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1616f0ac90
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remove deprecated functions
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2021-10-30 12:57:08 +02:00 |
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23b9741adf
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refine and fix TGC_C iss to becoem compliant
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2021-06-29 11:51:30 +02:00 |
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cf7b62a3f9
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update names
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2021-05-13 15:54:48 +02:00 |
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40db74ce02
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remove tgf_b code generation
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2021-03-07 16:26:14 +00:00 |
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dae8acb8a3
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checkpoint before refactor
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2021-03-06 07:17:42 +00:00 |
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9534d58d01
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regenerated sources and and add opcode enum to headers
Conflicts:
gen_input/CoreDSL-Instruction-Set-Description
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2021-03-01 06:26:33 +00:00 |
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1668df0531
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regenerated sources and and add opcode enum to headers
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2021-02-23 08:29:31 +00:00 |
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337f1634c0
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add mssing change
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2021-02-15 18:01:46 +00:00 |
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34bb8e62ae
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generate working ISS from CoreDSL 2.0
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2021-02-06 14:47:06 +00:00 |
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