MNRS-BM-BSP

7fc7e97fe3 CCC msg if update develop Stanislaw Kaushanski 2024-11-20 13:05:43 +0100
5eac63d773 fix timer macro Stanislaw Kaushanski 2024-11-06 11:24:09 +0100
e8cfbbdab0 add communication controller register interface Stanislaw Kaushanski 2024-11-05 13:01:57 +0100
8e62de5cdf add RAM linker file Stanislaw Kaushanski 2024-10-01 10:56:40 +0200
3484dc66e3 fix interrupt handler and Moonlight ROM size Stanislaw Kaushanski 2024-09-26 12:18:50 +0200
ea5d61ec0b adds some cosmetic fixes Eyck Jentzsch 2024-09-14 09:56:08 +0200
b36a42b386 update moonlight register headers. Remove unused control register in camera Stanislaw Kaushanski 2024-09-10 15:46:32 +0200
f632436fda rename SDMA to DMA Stanislaw Kaushanski 2024-08-28 16:18:18 +0200
7a065a1d24 adds non-vectored interrupt handler Eyck Jentzsch 2024-08-23 21:56:15 +0200
ac3ef788f9 fixes naming in qspi header Eyck Jentzsch 2024-08-18 20:27:41 +0200
a00e57a8d2 does some cleanup Eyck Jentzsch 2024-08-11 17:30:16 +0200
5d78f839a5 removes attribute packed as it disables word access generation by gcc Eyck Jentzsch 2024-08-11 17:29:43 +0200
46d55f353e adds signature to start of firmware Eyck Jentzsch 2024-08-11 17:29:13 +0200
d621264ef7 updates gpio registers Eyck Jentzsch 2024-08-09 14:20:00 +0200
785cf20e8e fixes include guards Eyck Jentzsch 2024-08-04 13:27:53 +0200
85ae6c1c59 simpledma renamed to dma Stanislaw Kaushanski 2024-08-02 12:36:38 +0200
2e98acdeb2 Ehrenberg firmware headers generated with peakrdl 1.2.8 Stanislaw Kaushanski 2024-08-02 09:55:38 +0200
79a245b7f2 updates Ehrenberg device files Eyck Jentzsch 2024-07-16 16:22:42 +0200
1f4b4d2bb9 updates ehrenberg dma device to support dual channel Eyck Jentzsch 2024-07-11 22:36:41 +0200
9d607e932a updates BSP definitions for Ehrenberg Eyck Jentzsch 2024-07-01 11:41:28 +0200
daa1ed184d adds missing ehrenberg devices Eyck Jentzsch 2024-06-10 12:21:20 +0200
231366cc94 updates ehrenberg devices and BSP Eyck Jentzsch 2024-06-10 10:13:07 +0200
c94eb7c61a update include path gabriel 2024-05-31 09:21:57 +0200
9407d2cec5 Merge branch 'develop' of https://git.minres.com/Firmware/MNRS-BM-BSP into develop gabriel 2024-05-31 08:58:05 +0200
092f0fdfd3 update include paths gabriel 2024-05-31 08:56:21 +0200
05062c5be4 updates Ehrenberg register description Eyck Jentzsch 2024-05-30 18:32:23 +0200
442384574b Merge branch 'develop' of https://git.minres.com/Firmware/MNRS-BM-BSP.git into develop Eyck Jentzsch 2024-05-29 20:50:30 +0200
ff8b3bb39c merge semihosting and bsp gabriel 2024-04-30 08:56:57 +0200
9aaf428620 further semihosting support gabriel 2024-04-30 08:48:44 +0200
87dc0ec230 Merge remote-tracking branch 'origin/develop' into main main Stanislaw Kaushanski 2024-04-17 08:27:23 +0200
71c7fd6981 changes type bc of name clashes Eyck-Alexander Jentzsch 2024-04-15 12:17:01 +0200
a45fee1f7e removes tgc-vp in favor of ehrenberg/tgc_vp Eyck-Alexander Jentzsch 2024-04-15 12:16:29 +0200
e83f7996bc Adding semihosting support for bmsp gabriel 2024-04-08 14:36:22 +0200
8ac5244670 changes fill naming to be stricly increasing Eyck-Alexander Jentzsch 2024-03-28 11:48:37 +0100
6365331de8 fixes bug that duplicated variable names Eyck-Alexander Jentzsch 2024-03-28 11:33:57 +0100
baddcf17af adds improved firmware headers for peripherals Eyck-Alexander Jentzsch 2024-03-28 09:34:01 +0100
7218dcfa69 changes target extension to become .elf Eyck Jentzsch 2024-03-24 19:16:13 +0100
3389875643 fixes rve settings Eyck Jentzsch 2024-03-21 07:23:21 +0100
4d25972e4d fixes TGCP environment Eyck Jentzsch 2024-03-20 12:53:12 +0100
e051cf180e Merge branch 'develop' Eyck Jentzsch 2024-03-20 07:38:03 +0100
28bf59f0e3 Merge branch 'develop' of https://git.minres.com/Firmware/MNRS-BM-BSP.git into develop Eyck Jentzsch 2024-03-15 08:35:58 +0100
da52573163 fixes and enhances SPI register description Eyck Jentzsch 2024-03-15 08:35:46 +0100
ab2b7214fe fixes TGCP env Eyck Jentzsch 2024-03-14 08:12:52 +0100
664dd67740 fixes build to adapt to renamed env Eyck Jentzsch 2024-03-02 16:08:42 +0100
20b2485ab9 renames TGCP environment Eyck Jentzsch 2024-03-02 15:40:07 +0100
20007672d2 adds fixes to build nanolib extensions Eyck Jentzsch 2024-03-02 12:19:13 +0100
6523206738 fixes for ehrenberg platform, minres peripheral functions and nanolib Eyck Jentzsch 2024-03-02 12:18:38 +0100
39ee91af7d first semihosting integration gabriel 2024-02-26 20:41:15 +0100
96fa7db587 modifies initcode and libwrap for new mnrs/ehrenberg vp Eyck-Alexander Jentzsch 2024-02-22 17:10:49 +0100
98760929c6 adds support for new mnrs peripherals Eyck-Alexander Jentzsch 2024-02-22 17:09:35 +0100
10b8f3173d paritally corrects platform map Eyck-Alexander Jentzsch 2024-02-08 12:23:06 +0100
532f7e9bb8 Merge branch 'develop' of https://git.minres.com/Firmware/MNRS-BM-BSP into develop gabriel 2024-01-30 08:42:55 +0100
7269306c93 making hello-world compile for all Boards gabriel 2024-01-30 08:30:42 +0100
d6919e9af6 making hello-world run on all Boards gabriel 2024-01-27 16:54:25 +0100
f9364c667b adds newlib-nano settings Eyck Jentzsch 2024-01-16 12:26:47 +0100
123f579105 fixes include paths Eyck Jentzsch 2024-01-14 20:35:05 +0100
b5101117aa cleans bsp a bit up Eyck Jentzsch 2024-01-14 08:14:57 +0100
5e7c2cbce9 add default linker file for flash Eyck Jentzsch 2024-01-13 23:24:39 +0100
13cd5cc76d adds ehrenberg platform Eyck Jentzsch 2024-01-13 23:06:01 +0100
1d55083a55 updates LICENSE Eyck Jentzsch 2024-01-13 08:30:30 +0100
1c600a0458 removes firmwares to just keep BSP Eyck Jentzsch 2024-01-13 08:28:11 +0100
7728785e27 Merge remote-tracking branch 'origin/develop' Eyck Jentzsch 2024-01-13 08:23:56 +0100
51c8a93336 fixes march definitions for dhrystone and coremark Eyck Jentzsch 2023-12-09 16:38:45 +0100
fe1136c7ce fixes ISA handling Eyck Jentzsch 2023-12-06 10:00:33 +0100
6ff0161882 adds some consistency fixes for variable ISA settings Eyck Jentzsch 2023-12-02 17:41:14 +0100
8c1c2766e8 Merge branch 'develop' into main Eyck Jentzsch 2023-12-02 16:27:30 +0100
1b8f78fe78 makes build more configurable by CLI Eyck Jentzsch 2023-11-27 10:13:22 +0100
d20582d7aa fix prci build Stanislaw Kaushanski 2023-11-24 13:06:31 +0100
0188d404de fixes hifive1 build Eyck Jentzsch 2023-11-24 11:39:23 +0100
77ca8a01b4 add hifive1 Stanislaw Kaushanski 2023-11-24 09:36:53 +0100
db53376533 Merge branch 'develop' into main Eyck Jentzsch 2023-11-23 18:30:43 +0100
41f204e304 adds wrapping to all clib symbols Eyck Jentzsch 2023-11-23 18:29:26 +0100
acf20a4818 adds missing files Eyck Jentzsch 2023-09-30 20:31:58 +0200
aab4d1f2a0 adds missing symbols and sources for libwrap Eyck Jentzsch 2023-09-28 11:51:20 +0200
e91ce0148b adds build targets Eyck Jentzsch 2023-10-30 07:51:59 +0100
7093e47c08 adds a CMakeLists.txt message to indicate board selection Eyck Jentzsch 2023-10-27 22:16:21 +0200
63f57b9ba1 extends eclipse build configs Eyck Jentzsch 2023-10-26 06:11:12 +0200
af3a154882 adds tgc-vp environment Eyck Jentzsch 2023-10-25 20:35:44 +0200
b082091db2 adds missing files Eyck Jentzsch 2023-09-30 20:31:58 +0200
eeb17437ee adds missing symbols and sources for libwrap Eyck Jentzsch 2023-09-28 11:51:20 +0200
9c0047b3ea updates linker script for rtl env Eyck Jentzsch 2023-08-30 15:07:56 +0200
ca1adccb2b fixes TGC5L settings Eyck Jentzsch 2023-08-28 10:01:06 +0200
3217871752 extends build system to propagate more settings Eyck Jentzsch 2023-08-20 16:45:54 +0200
9dd7dcb4ce adds TGC5L environment Eyck Jentzsch 2023-08-20 16:39:20 +0200
3403edcde9 adds CMakeLists.txt Eyck Jentzsch 2023-08-20 15:50:00 +0200
3a3cbf38c3 re-adds coremark as submodule Eyck Jentzsch 2023-08-20 15:23:05 +0200
822696ae0d cleanup Eyck Jentzsch 2023-08-20 15:20:39 +0200
314ceeb072 rework structure Eyck Jentzsch 2023-08-20 15:00:51 +0200
4c2208c1ac fix wrong exit call Eyck Jentzsch 2022-11-06 17:33:39 +0100
36a6de6dc0 remove raven dirs Stanislaw Kaushanski 2022-05-02 13:21:12 +0200
d2cb78724a move RAVEN FW into Validation-VP repo Stanislaw Kaushanski 2022-05-02 13:19:36 +0200
0de438dc52 avoid interrupts while printing Stanislaw Kaushanski 2022-05-02 09:51:05 +0200
5f44f8df98 Improve wait for interrupt routines Stanislaw Kaushanski 2022-04-28 19:20:32 +0200
02ce96eed8 improve interrupt handling Stanislaw Kaushanski 2022-04-26 15:29:49 +0200
46f197c287 Add additional registers for input to FW (number of XSPNs, batch size, iterations) Johannes Wirth 2022-03-11 14:21:25 +0100
43e2a299db fpga_spn: add check if input-/ref-data fits into memory Johannes Wirth 2022-03-10 14:17:52 +0100
8450f85c93 raven_spn: add check if input-/ref-data fits into memory Johannes Wirth 2022-03-10 13:11:10 +0100
a14ff554b0 Move XSPN input and ref data to Validation-VP Johannes Wirth 2022-03-10 13:09:11 +0100
588ca3c7ba Merge pull request 'Add allocate+free functionality for fpga' (#1) from feature/fpga-alloc-free into master Stanislaw Kaushanski 2022-02-11 16:12:21 +0100
91f28e9f2b Add allocate+free functionality for fpga Johannes Wirth 2022-01-20 18:22:21 +0100

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