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makes all inline functions static to make building w/o optimization possible

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This commit is contained in:
Eyck-Alexander Jentzsch 2025-03-28 23:05:08 +01:00
parent c3d9e5fa6f
commit 38246a05ce
12 changed files with 342 additions and 342 deletions
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24
include/minres/devices/gen/aclint.h
View File

@ -43,48 +43,48 @@ typedef struct {
#define ACLINT_MTIME_HI(V) ((V & ACLINT_MTIME_HI_MASK) << ACLINT_MTIME_HI_OFFS)
//ACLINT_MSIP0
inline uint32_t get_aclint_msip0(volatile aclint_t* reg){
static inline uint32_t get_aclint_msip0(volatile aclint_t* reg){
return reg->MSIP0;
}
inline void set_aclint_msip0(volatile aclint_t* reg, uint32_t value){
static inline void set_aclint_msip0(volatile aclint_t* reg, uint32_t value){
reg->MSIP0 = value;
}
inline uint32_t get_aclint_msip0_msip(volatile aclint_t* reg){
static inline uint32_t get_aclint_msip0_msip(volatile aclint_t* reg){
return (reg->MSIP0 >> 0) & 0x1;
}
inline void set_aclint_msip0_msip(volatile aclint_t* reg, uint8_t value){
static inline void set_aclint_msip0_msip(volatile aclint_t* reg, uint8_t value){
reg->MSIP0 = (reg->MSIP0 & ~(0x1U << 0)) | (value << 0);
}
//ACLINT_MTIMECMP0LO
inline uint32_t get_aclint_mtimecmp0lo(volatile aclint_t* reg){
static inline uint32_t get_aclint_mtimecmp0lo(volatile aclint_t* reg){
return (reg->MTIMECMP0LO >> 0) & 0xffffffff;
}
inline void set_aclint_mtimecmp0lo(volatile aclint_t* reg, uint32_t value){
static inline void set_aclint_mtimecmp0lo(volatile aclint_t* reg, uint32_t value){
reg->MTIMECMP0LO = (reg->MTIMECMP0LO & ~(0xffffffffU << 0)) | (value << 0);
}
//ACLINT_MTIMECMP0HI
inline uint32_t get_aclint_mtimecmp0hi(volatile aclint_t* reg){
static inline uint32_t get_aclint_mtimecmp0hi(volatile aclint_t* reg){
return (reg->MTIMECMP0HI >> 0) & 0xffffffff;
}
inline void set_aclint_mtimecmp0hi(volatile aclint_t* reg, uint32_t value){
static inline void set_aclint_mtimecmp0hi(volatile aclint_t* reg, uint32_t value){
reg->MTIMECMP0HI = (reg->MTIMECMP0HI & ~(0xffffffffU << 0)) | (value << 0);
}
//ACLINT_MTIME_LO
inline uint32_t get_aclint_mtime_lo(volatile aclint_t* reg){
static inline uint32_t get_aclint_mtime_lo(volatile aclint_t* reg){
return (reg->MTIME_LO >> 0) & 0xffffffff;
}
inline void set_aclint_mtime_lo(volatile aclint_t* reg, uint32_t value){
static inline void set_aclint_mtime_lo(volatile aclint_t* reg, uint32_t value){
reg->MTIME_LO = (reg->MTIME_LO & ~(0xffffffffU << 0)) | (value << 0);
}
//ACLINT_MTIME_HI
inline uint32_t get_aclint_mtime_hi(volatile aclint_t* reg){
static inline uint32_t get_aclint_mtime_hi(volatile aclint_t* reg){
return (reg->MTIME_HI >> 0) & 0xffffffff;
}
inline void set_aclint_mtime_hi(volatile aclint_t* reg, uint32_t value){
static inline void set_aclint_mtime_hi(volatile aclint_t* reg, uint32_t value){
reg->MTIME_HI = (reg->MTIME_HI & ~(0xffffffffU << 0)) | (value << 0);
}

156
include/minres/devices/gen/apb3spi.h
View File

@ -158,266 +158,266 @@ typedef struct {
#define APB3SPI_XIP_READ(V) ((V & APB3SPI_XIP_READ_MASK) << APB3SPI_XIP_READ_OFFS)
//APB3SPI_DATA
inline uint32_t get_apb3spi_data(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_data(volatile apb3spi_t* reg){
return reg->DATA;
}
inline void set_apb3spi_data(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_data(volatile apb3spi_t* reg, uint32_t value){
reg->DATA = value;
}
inline void set_apb3spi_data_data(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_data_data(volatile apb3spi_t* reg, uint8_t value){
reg->DATA = (reg->DATA & ~(0xffU << 0)) | (value << 0);
}
inline uint32_t get_apb3spi_data_write(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_data_write(volatile apb3spi_t* reg){
return (reg->DATA >> 8) & 0x1;
}
inline void set_apb3spi_data_write(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_data_write(volatile apb3spi_t* reg, uint8_t value){
reg->DATA = (reg->DATA & ~(0x1U << 8)) | (value << 8);
}
inline uint32_t get_apb3spi_data_read(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_data_read(volatile apb3spi_t* reg){
return (reg->DATA >> 9) & 0x1;
}
inline void set_apb3spi_data_read(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_data_read(volatile apb3spi_t* reg, uint8_t value){
reg->DATA = (reg->DATA & ~(0x1U << 9)) | (value << 9);
}
inline uint32_t get_apb3spi_data_kind(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_data_kind(volatile apb3spi_t* reg){
return (reg->DATA >> 11) & 0x1;
}
inline void set_apb3spi_data_kind(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_data_kind(volatile apb3spi_t* reg, uint8_t value){
reg->DATA = (reg->DATA & ~(0x1U << 11)) | (value << 11);
}
inline uint32_t get_apb3spi_data_rx_data_invalid(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_data_rx_data_invalid(volatile apb3spi_t* reg){
return (reg->DATA >> 31) & 0x1;
}
//APB3SPI_STATUS
inline uint32_t get_apb3spi_status(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_status(volatile apb3spi_t* reg){
return reg->STATUS;
}
inline uint32_t get_apb3spi_status_tx_free(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_status_tx_free(volatile apb3spi_t* reg){
return (reg->STATUS >> 0) & 0x3f;
}
inline uint32_t get_apb3spi_status_rx_avail(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_status_rx_avail(volatile apb3spi_t* reg){
return (reg->STATUS >> 16) & 0x3f;
}
//APB3SPI_CONFIG
inline uint32_t get_apb3spi_config(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_config(volatile apb3spi_t* reg){
return reg->CONFIG;
}
inline void set_apb3spi_config(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_config(volatile apb3spi_t* reg, uint32_t value){
reg->CONFIG = value;
}
inline uint32_t get_apb3spi_config_kind(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_config_kind(volatile apb3spi_t* reg){
return (reg->CONFIG >> 0) & 0x3;
}
inline void set_apb3spi_config_kind(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_config_kind(volatile apb3spi_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 0)) | (value << 0);
}
inline uint32_t get_apb3spi_config_mode(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_config_mode(volatile apb3spi_t* reg){
return (reg->CONFIG >> 4) & 0x3;
}
inline void set_apb3spi_config_mode(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_config_mode(volatile apb3spi_t* reg, uint8_t value){
reg->CONFIG = (reg->CONFIG & ~(0x3U << 4)) | (value << 4);
}
//APB3SPI_INTR
inline uint32_t get_apb3spi_intr(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_intr(volatile apb3spi_t* reg){
return reg->INTR;
}
inline void set_apb3spi_intr(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_intr(volatile apb3spi_t* reg, uint32_t value){
reg->INTR = value;
}
inline uint32_t get_apb3spi_intr_tx_ie(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_intr_tx_ie(volatile apb3spi_t* reg){
return (reg->INTR >> 0) & 0x1;
}
inline void set_apb3spi_intr_tx_ie(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_intr_tx_ie(volatile apb3spi_t* reg, uint8_t value){
reg->INTR = (reg->INTR & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_apb3spi_intr_rx_ie(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_intr_rx_ie(volatile apb3spi_t* reg){
return (reg->INTR >> 1) & 0x1;
}
inline void set_apb3spi_intr_rx_ie(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_intr_rx_ie(volatile apb3spi_t* reg, uint8_t value){
reg->INTR = (reg->INTR & ~(0x1U << 1)) | (value << 1);
}
inline uint32_t get_apb3spi_intr_tx_ip(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_intr_tx_ip(volatile apb3spi_t* reg){
return (reg->INTR >> 8) & 0x1;
}
inline uint32_t get_apb3spi_intr_rx_ip(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_intr_rx_ip(volatile apb3spi_t* reg){
return (reg->INTR >> 9) & 0x1;
}
inline uint32_t get_apb3spi_intr_tx_active(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_intr_tx_active(volatile apb3spi_t* reg){
return (reg->INTR >> 16) & 0x1;
}
//APB3SPI_SCLK_CONFIG
inline uint32_t get_apb3spi_sclk_config(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_sclk_config(volatile apb3spi_t* reg){
return reg->SCLK_CONFIG;
}
inline void set_apb3spi_sclk_config(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_sclk_config(volatile apb3spi_t* reg, uint32_t value){
reg->SCLK_CONFIG = value;
}
inline uint32_t get_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg){
return (reg->SCLK_CONFIG >> 0) & 0xfff;
}
inline void set_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg, uint16_t value){
static inline void set_apb3spi_sclk_config_clk_divider(volatile apb3spi_t* reg, uint16_t value){
reg->SCLK_CONFIG = (reg->SCLK_CONFIG & ~(0xfffU << 0)) | (value << 0);
}
//APB3SPI_SSGEN_SETUP
inline uint32_t get_apb3spi_ssgen_setup(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_setup(volatile apb3spi_t* reg){
return reg->SSGEN_SETUP;
}
inline void set_apb3spi_ssgen_setup(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_ssgen_setup(volatile apb3spi_t* reg, uint32_t value){
reg->SSGEN_SETUP = value;
}
inline uint32_t get_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg){
return (reg->SSGEN_SETUP >> 0) & 0xfff;
}
inline void set_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg, uint16_t value){
static inline void set_apb3spi_ssgen_setup_setup_cycles(volatile apb3spi_t* reg, uint16_t value){
reg->SSGEN_SETUP = (reg->SSGEN_SETUP & ~(0xfffU << 0)) | (value << 0);
}
//APB3SPI_SSGEN_HOLD
inline uint32_t get_apb3spi_ssgen_hold(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_hold(volatile apb3spi_t* reg){
return reg->SSGEN_HOLD;
}
inline void set_apb3spi_ssgen_hold(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_ssgen_hold(volatile apb3spi_t* reg, uint32_t value){
reg->SSGEN_HOLD = value;
}
inline uint32_t get_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg){
return (reg->SSGEN_HOLD >> 0) & 0xfff;
}
inline void set_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg, uint16_t value){
static inline void set_apb3spi_ssgen_hold_hold_cycles(volatile apb3spi_t* reg, uint16_t value){
reg->SSGEN_HOLD = (reg->SSGEN_HOLD & ~(0xfffU << 0)) | (value << 0);
}
//APB3SPI_SSGEN_DISABLE
inline uint32_t get_apb3spi_ssgen_disable(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_disable(volatile apb3spi_t* reg){
return reg->SSGEN_DISABLE;
}
inline void set_apb3spi_ssgen_disable(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_ssgen_disable(volatile apb3spi_t* reg, uint32_t value){
reg->SSGEN_DISABLE = value;
}
inline uint32_t get_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg){
return (reg->SSGEN_DISABLE >> 0) & 0xfff;
}
inline void set_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg, uint16_t value){
static inline void set_apb3spi_ssgen_disable_disable_cycles(volatile apb3spi_t* reg, uint16_t value){
reg->SSGEN_DISABLE = (reg->SSGEN_DISABLE & ~(0xfffU << 0)) | (value << 0);
}
//APB3SPI_SSGEN_ACTIVE_HIGH
inline uint32_t get_apb3spi_ssgen_active_high(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_active_high(volatile apb3spi_t* reg){
return reg->SSGEN_ACTIVE_HIGH;
}
inline void set_apb3spi_ssgen_active_high(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_ssgen_active_high(volatile apb3spi_t* reg, uint32_t value){
reg->SSGEN_ACTIVE_HIGH = value;
}
inline uint32_t get_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg){
return (reg->SSGEN_ACTIVE_HIGH >> 0) & 0x1;
}
inline void set_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_ssgen_active_high_spi_cs_active_high(volatile apb3spi_t* reg, uint8_t value){
reg->SSGEN_ACTIVE_HIGH = (reg->SSGEN_ACTIVE_HIGH & ~(0x1U << 0)) | (value << 0);
}
//APB3SPI_XIP_ENABLE
inline uint32_t get_apb3spi_xip_enable(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_enable(volatile apb3spi_t* reg){
return reg->XIP_ENABLE;
}
inline void set_apb3spi_xip_enable(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_xip_enable(volatile apb3spi_t* reg, uint32_t value){
reg->XIP_ENABLE = value;
}
inline uint32_t get_apb3spi_xip_enable_enable(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_enable_enable(volatile apb3spi_t* reg){
return (reg->XIP_ENABLE >> 0) & 0x1;
}
inline void set_apb3spi_xip_enable_enable(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_enable_enable(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_ENABLE = (reg->XIP_ENABLE & ~(0x1U << 0)) | (value << 0);
}
//APB3SPI_XIP_CONFIG
inline uint32_t get_apb3spi_xip_config(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_config(volatile apb3spi_t* reg){
return reg->XIP_CONFIG;
}
inline void set_apb3spi_xip_config(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_xip_config(volatile apb3spi_t* reg, uint32_t value){
reg->XIP_CONFIG = value;
}
inline uint32_t get_apb3spi_xip_config_instruction(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_config_instruction(volatile apb3spi_t* reg){
return (reg->XIP_CONFIG >> 0) & 0xff;
}
inline void set_apb3spi_xip_config_instruction(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_config_instruction(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 0)) | (value << 0);
}
inline uint32_t get_apb3spi_xip_config_enable(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_config_enable(volatile apb3spi_t* reg){
return (reg->XIP_CONFIG >> 8) & 0x1;
}
inline void set_apb3spi_xip_config_enable(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_config_enable(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0x1U << 8)) | (value << 8);
}
inline uint32_t get_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg){
return (reg->XIP_CONFIG >> 16) & 0xff;
}
inline void set_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_config_dummy_value(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xffU << 16)) | (value << 16);
}
inline uint32_t get_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg){
return (reg->XIP_CONFIG >> 24) & 0xf;
}
inline void set_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_config_dummy_count(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_CONFIG = (reg->XIP_CONFIG & ~(0xfU << 24)) | (value << 24);
}
//APB3SPI_XIP_MODE
inline uint32_t get_apb3spi_xip_mode(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_mode(volatile apb3spi_t* reg){
return reg->XIP_MODE;
}
inline void set_apb3spi_xip_mode(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_xip_mode(volatile apb3spi_t* reg, uint32_t value){
reg->XIP_MODE = value;
}
inline uint32_t get_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg){
return (reg->XIP_MODE >> 0) & 0x3;
}
inline void set_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_mode_instruction(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 0)) | (value << 0);
}
inline uint32_t get_apb3spi_xip_mode_address(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_mode_address(volatile apb3spi_t* reg){
return (reg->XIP_MODE >> 8) & 0x3;
}
inline void set_apb3spi_xip_mode_address(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_mode_address(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 8)) | (value << 8);
}
inline uint32_t get_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg){
return (reg->XIP_MODE >> 16) & 0x3;
}
inline void set_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_mode_dummy(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 16)) | (value << 16);
}
inline uint32_t get_apb3spi_xip_mode_payload(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_mode_payload(volatile apb3spi_t* reg){
return (reg->XIP_MODE >> 24) & 0x3;
}
inline void set_apb3spi_xip_mode_payload(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_mode_payload(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_MODE = (reg->XIP_MODE & ~(0x3U << 24)) | (value << 24);
}
//APB3SPI_XIP_WRITE
inline void set_apb3spi_xip_write(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_xip_write(volatile apb3spi_t* reg, uint32_t value){
reg->XIP_WRITE = value;
}
inline void set_apb3spi_xip_write_data(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_write_data(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_WRITE = (reg->XIP_WRITE & ~(0xffU << 0)) | (value << 0);
}
//APB3SPI_XIP_READ_WRITE
inline void set_apb3spi_xip_read_write(volatile apb3spi_t* reg, uint32_t value){
static inline void set_apb3spi_xip_read_write(volatile apb3spi_t* reg, uint32_t value){
reg->XIP_READ_WRITE = value;
}
inline void set_apb3spi_xip_read_write_data(volatile apb3spi_t* reg, uint8_t value){
static inline void set_apb3spi_xip_read_write_data(volatile apb3spi_t* reg, uint8_t value){
reg->XIP_READ_WRITE = (reg->XIP_READ_WRITE & ~(0xffU << 0)) | (value << 0);
}
//APB3SPI_XIP_READ
inline uint32_t get_apb3spi_xip_read(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_read(volatile apb3spi_t* reg){
return reg->XIP_READ;
}
inline uint32_t get_apb3spi_xip_read_data(volatile apb3spi_t* reg){
static inline uint32_t get_apb3spi_xip_read_data(volatile apb3spi_t* reg){
return (reg->XIP_READ >> 0) & 0xff;
}

44
include/minres/devices/gen/camera.h
View File

@ -49,78 +49,78 @@ typedef struct {
#define CAMERA_IP_FRAME_FINISHED_IRQ_PEND(V) ((V & CAMERA_IP_FRAME_FINISHED_IRQ_PEND_MASK) << CAMERA_IP_FRAME_FINISHED_IRQ_PEND_OFFS)
//CAMERA_PIXEL
inline uint32_t get_camera_pixel(volatile camera_t* reg){
static inline uint32_t get_camera_pixel(volatile camera_t* reg){
return reg->PIXEL;
}
inline void set_camera_pixel(volatile camera_t* reg, uint32_t value){
static inline void set_camera_pixel(volatile camera_t* reg, uint32_t value){
reg->PIXEL = value;
}
inline uint32_t get_camera_pixel_data(volatile camera_t* reg){
static inline uint32_t get_camera_pixel_data(volatile camera_t* reg){
return (reg->PIXEL >> 0) & 0x7ff;
}
inline void set_camera_pixel_data(volatile camera_t* reg, uint16_t value){
static inline void set_camera_pixel_data(volatile camera_t* reg, uint16_t value){
reg->PIXEL = (reg->PIXEL & ~(0x7ffU << 0)) | (value << 0);
}
//CAMERA_STATUS
inline uint32_t get_camera_status(volatile camera_t* reg){
static inline uint32_t get_camera_status(volatile camera_t* reg){
return reg->STATUS;
}
inline uint32_t get_camera_status_pixel_avail(volatile camera_t* reg){
static inline uint32_t get_camera_status_pixel_avail(volatile camera_t* reg){
return (reg->STATUS >> 0) & 0x1;
}
//CAMERA_CAMERA_CLOCK_CTRL
inline uint32_t get_camera_camera_clock_ctrl(volatile camera_t* reg){
static inline uint32_t get_camera_camera_clock_ctrl(volatile camera_t* reg){
return reg->CAMERA_CLOCK_CTRL;
}
inline void set_camera_camera_clock_ctrl(volatile camera_t* reg, uint32_t value){
static inline void set_camera_camera_clock_ctrl(volatile camera_t* reg, uint32_t value){
reg->CAMERA_CLOCK_CTRL = value;
}
inline uint32_t get_camera_camera_clock_ctrl_divider(volatile camera_t* reg){
static inline uint32_t get_camera_camera_clock_ctrl_divider(volatile camera_t* reg){
return (reg->CAMERA_CLOCK_CTRL >> 0) & 0xfffff;
}
inline void set_camera_camera_clock_ctrl_divider(volatile camera_t* reg, uint32_t value){
static inline void set_camera_camera_clock_ctrl_divider(volatile camera_t* reg, uint32_t value){
reg->CAMERA_CLOCK_CTRL = (reg->CAMERA_CLOCK_CTRL & ~(0xfffffU << 0)) | (value << 0);
}
//CAMERA_IE
inline uint32_t get_camera_ie(volatile camera_t* reg){
static inline uint32_t get_camera_ie(volatile camera_t* reg){
return reg->IE;
}
inline void set_camera_ie(volatile camera_t* reg, uint32_t value){
static inline void set_camera_ie(volatile camera_t* reg, uint32_t value){
reg->IE = value;
}
inline uint32_t get_camera_ie_en_pixel_avail(volatile camera_t* reg){
static inline uint32_t get_camera_ie_en_pixel_avail(volatile camera_t* reg){
return (reg->IE >> 0) & 0x1;
}
inline void set_camera_ie_en_pixel_avail(volatile camera_t* reg, uint8_t value){
static inline void set_camera_ie_en_pixel_avail(volatile camera_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_camera_ie_en_frame_finished(volatile camera_t* reg){
static inline uint32_t get_camera_ie_en_frame_finished(volatile camera_t* reg){
return (reg->IE >> 1) & 0x1;
}
inline void set_camera_ie_en_frame_finished(volatile camera_t* reg, uint8_t value){
static inline void set_camera_ie_en_frame_finished(volatile camera_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1);
}
//CAMERA_IP
inline uint32_t get_camera_ip(volatile camera_t* reg){
static inline uint32_t get_camera_ip(volatile camera_t* reg){
return reg->IP;
}
inline void set_camera_ip(volatile camera_t* reg, uint32_t value){
static inline void set_camera_ip(volatile camera_t* reg, uint32_t value){
reg->IP = value;
}
inline uint32_t get_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg){
static inline uint32_t get_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg){
return (reg->IP >> 0) & 0x1;
}
inline void set_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg, uint8_t value){
static inline void set_camera_ip_pixel_avail_irq_pend(volatile camera_t* reg, uint8_t value){
reg->IP = (reg->IP & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_camera_ip_frame_finished_irq_pend(volatile camera_t* reg){
static inline uint32_t get_camera_ip_frame_finished_irq_pend(volatile camera_t* reg){
return (reg->IP >> 1) & 0x1;
}
inline void set_camera_ip_frame_finished_irq_pend(volatile camera_t* reg, uint8_t value){
static inline void set_camera_ip_frame_finished_irq_pend(volatile camera_t* reg, uint8_t value){
reg->IP = (reg->IP & ~(0x1U << 1)) | (value << 1);
}

168
include/minres/devices/gen/dma.h
View File

@ -168,286 +168,286 @@ typedef struct {
#define DMA_CH1_DST_ADDR_INC_DST_STRIDE(V) ((V & DMA_CH1_DST_ADDR_INC_DST_STRIDE_MASK) << DMA_CH1_DST_ADDR_INC_DST_STRIDE_OFFS)
//DMA_CONTROL
inline uint32_t get_dma_control(volatile dma_t* reg){
static inline uint32_t get_dma_control(volatile dma_t* reg){
return reg->CONTROL;
}
inline void set_dma_control(volatile dma_t* reg, uint32_t value){
static inline void set_dma_control(volatile dma_t* reg, uint32_t value){
reg->CONTROL = value;
}
inline uint32_t get_dma_control_ch0_enable_transfer(volatile dma_t* reg){
static inline uint32_t get_dma_control_ch0_enable_transfer(volatile dma_t* reg){
return (reg->CONTROL >> 0) & 0x1;
}
inline void set_dma_control_ch0_enable_transfer(volatile dma_t* reg, uint8_t value){
static inline void set_dma_control_ch0_enable_transfer(volatile dma_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_dma_control_ch1_enable_transfer(volatile dma_t* reg){
static inline uint32_t get_dma_control_ch1_enable_transfer(volatile dma_t* reg){
return (reg->CONTROL >> 1) & 0x1;
}
inline void set_dma_control_ch1_enable_transfer(volatile dma_t* reg, uint8_t value){
static inline void set_dma_control_ch1_enable_transfer(volatile dma_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x1U << 1)) | (value << 1);
}
//DMA_STATUS
inline uint32_t get_dma_status(volatile dma_t* reg){
static inline uint32_t get_dma_status(volatile dma_t* reg){
return reg->STATUS;
}
inline uint32_t get_dma_status_ch0_busy(volatile dma_t* reg){
static inline uint32_t get_dma_status_ch0_busy(volatile dma_t* reg){
return (reg->STATUS >> 0) & 0x1;
}
inline uint32_t get_dma_status_ch1_busy(volatile dma_t* reg){
static inline uint32_t get_dma_status_ch1_busy(volatile dma_t* reg){
return (reg->STATUS >> 1) & 0x1;
}
//DMA_IE
inline uint32_t get_dma_ie(volatile dma_t* reg){
static inline uint32_t get_dma_ie(volatile dma_t* reg){
return reg->IE;
}
inline void set_dma_ie(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ie(volatile dma_t* reg, uint32_t value){
reg->IE = value;
}
inline uint32_t get_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg){
return (reg->IE >> 0) & 0x1;
}
inline void set_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ie_ch0_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg){
return (reg->IE >> 1) & 0x1;
}
inline void set_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ie_ch0_ie_transfer_done(volatile dma_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1);
}
inline uint32_t get_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg){
return (reg->IE >> 2) & 0x1;
}
inline void set_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ie_ch1_ie_seg_transfer_done(volatile dma_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 2)) | (value << 2);
}
inline uint32_t get_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg){
return (reg->IE >> 3) & 0x1;
}
inline void set_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ie_ch1_ie_transfer_done(volatile dma_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 3)) | (value << 3);
}
//DMA_IP
inline uint32_t get_dma_ip(volatile dma_t* reg){
static inline uint32_t get_dma_ip(volatile dma_t* reg){
return reg->IP;
}
inline uint32_t get_dma_ip_ch0_ip_seg_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ip_ch0_ip_seg_transfer_done(volatile dma_t* reg){
return (reg->IP >> 0) & 0x1;
}
inline uint32_t get_dma_ip_ch0_ip_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ip_ch0_ip_transfer_done(volatile dma_t* reg){
return (reg->IP >> 1) & 0x1;
}
inline uint32_t get_dma_ip_ch1_ip_seg_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ip_ch1_ip_seg_transfer_done(volatile dma_t* reg){
return (reg->IP >> 2) & 0x1;
}
inline uint32_t get_dma_ip_ch1_ip_transfer_done(volatile dma_t* reg){
static inline uint32_t get_dma_ip_ch1_ip_transfer_done(volatile dma_t* reg){
return (reg->IP >> 3) & 0x1;
}
//DMA_CH0_EVENT
inline uint32_t get_dma_ch0_event(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_event(volatile dma_t* reg){
return reg->CH0_EVENT;
}
inline void set_dma_ch0_event(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_event(volatile dma_t* reg, uint32_t value){
reg->CH0_EVENT = value;
}
inline uint32_t get_dma_ch0_event_select(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_event_select(volatile dma_t* reg){
return (reg->CH0_EVENT >> 0) & 0x1f;
}
inline void set_dma_ch0_event_select(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ch0_event_select(volatile dma_t* reg, uint8_t value){
reg->CH0_EVENT = (reg->CH0_EVENT & ~(0x1fU << 0)) | (value << 0);
}
inline uint32_t get_dma_ch0_event_combine(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_event_combine(volatile dma_t* reg){
return (reg->CH0_EVENT >> 31) & 0x1;
}
inline void set_dma_ch0_event_combine(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ch0_event_combine(volatile dma_t* reg, uint8_t value){
reg->CH0_EVENT = (reg->CH0_EVENT & ~(0x1U << 31)) | (value << 31);
}
//DMA_CH0_TRANSFER
inline uint32_t get_dma_ch0_transfer(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_transfer(volatile dma_t* reg){
return reg->CH0_TRANSFER;
}
inline void set_dma_ch0_transfer(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_transfer(volatile dma_t* reg, uint32_t value){
reg->CH0_TRANSFER = value;
}
inline uint32_t get_dma_ch0_transfer_width(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_transfer_width(volatile dma_t* reg){
return (reg->CH0_TRANSFER >> 0) & 0x3;
}
inline void set_dma_ch0_transfer_width(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ch0_transfer_width(volatile dma_t* reg, uint8_t value){
reg->CH0_TRANSFER = (reg->CH0_TRANSFER & ~(0x3U << 0)) | (value << 0);
}
inline uint32_t get_dma_ch0_transfer_seg_length(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_transfer_seg_length(volatile dma_t* reg){
return (reg->CH0_TRANSFER >> 2) & 0x3ff;
}
inline void set_dma_ch0_transfer_seg_length(volatile dma_t* reg, uint16_t value){
static inline void set_dma_ch0_transfer_seg_length(volatile dma_t* reg, uint16_t value){
reg->CH0_TRANSFER = (reg->CH0_TRANSFER & ~(0x3ffU << 2)) | (value << 2);
}
inline uint32_t get_dma_ch0_transfer_seg_count(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_transfer_seg_count(volatile dma_t* reg){
return (reg->CH0_TRANSFER >> 12) & 0xfffff;
}
inline void set_dma_ch0_transfer_seg_count(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_transfer_seg_count(volatile dma_t* reg, uint32_t value){
reg->CH0_TRANSFER = (reg->CH0_TRANSFER & ~(0xfffffU << 12)) | (value << 12);
}
//DMA_CH0_SRC_START_ADDR
inline uint32_t get_dma_ch0_src_start_addr(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_src_start_addr(volatile dma_t* reg){
return (reg->CH0_SRC_START_ADDR >> 0) & 0xffffffff;
}
inline void set_dma_ch0_src_start_addr(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_src_start_addr(volatile dma_t* reg, uint32_t value){
reg->CH0_SRC_START_ADDR = (reg->CH0_SRC_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
}
//DMA_CH0_SRC_ADDR_INC
inline uint32_t get_dma_ch0_src_addr_inc(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_src_addr_inc(volatile dma_t* reg){
return reg->CH0_SRC_ADDR_INC;
}
inline void set_dma_ch0_src_addr_inc(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_src_addr_inc(volatile dma_t* reg, uint32_t value){
reg->CH0_SRC_ADDR_INC = value;
}
inline uint32_t get_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg){
return (reg->CH0_SRC_ADDR_INC >> 0) & 0xfff;
}
inline void set_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
static inline void set_dma_ch0_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
reg->CH0_SRC_ADDR_INC = (reg->CH0_SRC_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
}
inline uint32_t get_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg){
return (reg->CH0_SRC_ADDR_INC >> 12) & 0xfffff;
}
inline void set_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
reg->CH0_SRC_ADDR_INC = (reg->CH0_SRC_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
}
//DMA_CH0_DST_START_ADDR
inline uint32_t get_dma_ch0_dst_start_addr(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_dst_start_addr(volatile dma_t* reg){
return (reg->CH0_DST_START_ADDR >> 0) & 0xffffffff;
}
inline void set_dma_ch0_dst_start_addr(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_dst_start_addr(volatile dma_t* reg, uint32_t value){
reg->CH0_DST_START_ADDR = (reg->CH0_DST_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
}
//DMA_CH0_DST_ADDR_INC
inline uint32_t get_dma_ch0_dst_addr_inc(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_dst_addr_inc(volatile dma_t* reg){
return reg->CH0_DST_ADDR_INC;
}
inline void set_dma_ch0_dst_addr_inc(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_dst_addr_inc(volatile dma_t* reg, uint32_t value){
reg->CH0_DST_ADDR_INC = value;
}
inline uint32_t get_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg){
return (reg->CH0_DST_ADDR_INC >> 0) & 0xfff;
}
inline void set_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
static inline void set_dma_ch0_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
reg->CH0_DST_ADDR_INC = (reg->CH0_DST_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
}
inline uint32_t get_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg){
static inline uint32_t get_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg){
return (reg->CH0_DST_ADDR_INC >> 12) & 0xfffff;
}
inline void set_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch0_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
reg->CH0_DST_ADDR_INC = (reg->CH0_DST_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
}
//DMA_CH1_EVENT
inline uint32_t get_dma_ch1_event(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_event(volatile dma_t* reg){
return reg->CH1_EVENT;
}
inline void set_dma_ch1_event(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_event(volatile dma_t* reg, uint32_t value){
reg->CH1_EVENT = value;
}
inline uint32_t get_dma_ch1_event_select(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_event_select(volatile dma_t* reg){
return (reg->CH1_EVENT >> 0) & 0x1f;
}
inline void set_dma_ch1_event_select(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ch1_event_select(volatile dma_t* reg, uint8_t value){
reg->CH1_EVENT = (reg->CH1_EVENT & ~(0x1fU << 0)) | (value << 0);
}
inline uint32_t get_dma_ch1_event_combine(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_event_combine(volatile dma_t* reg){
return (reg->CH1_EVENT >> 31) & 0x1;
}
inline void set_dma_ch1_event_combine(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ch1_event_combine(volatile dma_t* reg, uint8_t value){
reg->CH1_EVENT = (reg->CH1_EVENT & ~(0x1U << 31)) | (value << 31);
}
//DMA_CH1_TRANSFER
inline uint32_t get_dma_ch1_transfer(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_transfer(volatile dma_t* reg){
return reg->CH1_TRANSFER;
}
inline void set_dma_ch1_transfer(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_transfer(volatile dma_t* reg, uint32_t value){
reg->CH1_TRANSFER = value;
}
inline uint32_t get_dma_ch1_transfer_width(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_transfer_width(volatile dma_t* reg){
return (reg->CH1_TRANSFER >> 0) & 0x3;
}
inline void set_dma_ch1_transfer_width(volatile dma_t* reg, uint8_t value){
static inline void set_dma_ch1_transfer_width(volatile dma_t* reg, uint8_t value){
reg->CH1_TRANSFER = (reg->CH1_TRANSFER & ~(0x3U << 0)) | (value << 0);
}
inline uint32_t get_dma_ch1_transfer_seg_length(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_transfer_seg_length(volatile dma_t* reg){
return (reg->CH1_TRANSFER >> 2) & 0x3ff;
}
inline void set_dma_ch1_transfer_seg_length(volatile dma_t* reg, uint16_t value){
static inline void set_dma_ch1_transfer_seg_length(volatile dma_t* reg, uint16_t value){
reg->CH1_TRANSFER = (reg->CH1_TRANSFER & ~(0x3ffU << 2)) | (value << 2);
}
inline uint32_t get_dma_ch1_transfer_seg_count(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_transfer_seg_count(volatile dma_t* reg){
return (reg->CH1_TRANSFER >> 12) & 0xfffff;
}
inline void set_dma_ch1_transfer_seg_count(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_transfer_seg_count(volatile dma_t* reg, uint32_t value){
reg->CH1_TRANSFER = (reg->CH1_TRANSFER & ~(0xfffffU << 12)) | (value << 12);
}
//DMA_CH1_SRC_START_ADDR
inline uint32_t get_dma_ch1_src_start_addr(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_src_start_addr(volatile dma_t* reg){
return (reg->CH1_SRC_START_ADDR >> 0) & 0xffffffff;
}
inline void set_dma_ch1_src_start_addr(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_src_start_addr(volatile dma_t* reg, uint32_t value){
reg->CH1_SRC_START_ADDR = (reg->CH1_SRC_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
}
//DMA_CH1_SRC_ADDR_INC
inline uint32_t get_dma_ch1_src_addr_inc(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_src_addr_inc(volatile dma_t* reg){
return reg->CH1_SRC_ADDR_INC;
}
inline void set_dma_ch1_src_addr_inc(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_src_addr_inc(volatile dma_t* reg, uint32_t value){
reg->CH1_SRC_ADDR_INC = value;
}
inline uint32_t get_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg){
return (reg->CH1_SRC_ADDR_INC >> 0) & 0xfff;
}
inline void set_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
static inline void set_dma_ch1_src_addr_inc_src_step(volatile dma_t* reg, uint16_t value){
reg->CH1_SRC_ADDR_INC = (reg->CH1_SRC_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
}
inline uint32_t get_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg){
return (reg->CH1_SRC_ADDR_INC >> 12) & 0xfffff;
}
inline void set_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_src_addr_inc_src_stride(volatile dma_t* reg, uint32_t value){
reg->CH1_SRC_ADDR_INC = (reg->CH1_SRC_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
}
//DMA_CH1_DST_START_ADDR
inline uint32_t get_dma_ch1_dst_start_addr(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_dst_start_addr(volatile dma_t* reg){
return (reg->CH1_DST_START_ADDR >> 0) & 0xffffffff;
}
inline void set_dma_ch1_dst_start_addr(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_dst_start_addr(volatile dma_t* reg, uint32_t value){
reg->CH1_DST_START_ADDR = (reg->CH1_DST_START_ADDR & ~(0xffffffffU << 0)) | (value << 0);
}
//DMA_CH1_DST_ADDR_INC
inline uint32_t get_dma_ch1_dst_addr_inc(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_dst_addr_inc(volatile dma_t* reg){
return reg->CH1_DST_ADDR_INC;
}
inline void set_dma_ch1_dst_addr_inc(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_dst_addr_inc(volatile dma_t* reg, uint32_t value){
reg->CH1_DST_ADDR_INC = value;
}
inline uint32_t get_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg){
return (reg->CH1_DST_ADDR_INC >> 0) & 0xfff;
}
inline void set_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
static inline void set_dma_ch1_dst_addr_inc_dst_step(volatile dma_t* reg, uint16_t value){
reg->CH1_DST_ADDR_INC = (reg->CH1_DST_ADDR_INC & ~(0xfffU << 0)) | (value << 0);
}
inline uint32_t get_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg){
static inline uint32_t get_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg){
return (reg->CH1_DST_ADDR_INC >> 12) & 0xfffff;
}
inline void set_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
static inline void set_dma_ch1_dst_addr_inc_dst_stride(volatile dma_t* reg, uint32_t value){
reg->CH1_DST_ADDR_INC = (reg->CH1_DST_ADDR_INC & ~(0xfffffU << 12)) | (value << 12);
}

30
include/minres/devices/gen/gpio.h
View File

@ -56,63 +56,63 @@ typedef struct {
#define GPIO_BOOT_SEL(V) ((V & GPIO_BOOT_SEL_MASK) << GPIO_BOOT_SEL_OFFS)
//GPIO_VALUE
inline uint32_t get_gpio_value(volatile gpio_t* reg){
static inline uint32_t get_gpio_value(volatile gpio_t* reg){
return (reg->VALUE >> 0) & 0xffffffff;
}
//GPIO_WRITE
inline uint32_t get_gpio_write(volatile gpio_t* reg){
static inline uint32_t get_gpio_write(volatile gpio_t* reg){
return (reg->WRITE >> 0) & 0xffffffff;
}
inline void set_gpio_write(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_write(volatile gpio_t* reg, uint32_t value){
reg->WRITE = (reg->WRITE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_WRITEENABLE
inline uint32_t get_gpio_writeEnable(volatile gpio_t* reg){
static inline uint32_t get_gpio_writeEnable(volatile gpio_t* reg){
return (reg->WRITEENABLE >> 0) & 0xffffffff;
}
inline void set_gpio_writeEnable(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_writeEnable(volatile gpio_t* reg, uint32_t value){
reg->WRITEENABLE = (reg->WRITEENABLE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IE
inline uint32_t get_gpio_ie(volatile gpio_t* reg){
static inline uint32_t get_gpio_ie(volatile gpio_t* reg){
return (reg->IE >> 0) & 0xffffffff;
}
inline void set_gpio_ie(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_ie(volatile gpio_t* reg, uint32_t value){
reg->IE = (reg->IE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IP
inline uint32_t get_gpio_ip(volatile gpio_t* reg){
static inline uint32_t get_gpio_ip(volatile gpio_t* reg){
return (reg->IP >> 0) & 0xffffffff;
}
inline void set_gpio_ip(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_ip(volatile gpio_t* reg, uint32_t value){
reg->IP = (reg->IP & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IRQ_TRIGGER
inline uint32_t get_gpio_irq_trigger(volatile gpio_t* reg){
static inline uint32_t get_gpio_irq_trigger(volatile gpio_t* reg){
return (reg->IRQ_TRIGGER >> 0) & 0xffffffff;
}
inline void set_gpio_irq_trigger(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_irq_trigger(volatile gpio_t* reg, uint32_t value){
reg->IRQ_TRIGGER = (reg->IRQ_TRIGGER & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_IRQ_TYPE
inline uint32_t get_gpio_irq_type(volatile gpio_t* reg){
static inline uint32_t get_gpio_irq_type(volatile gpio_t* reg){
return (reg->IRQ_TYPE >> 0) & 0xffffffff;
}
inline void set_gpio_irq_type(volatile gpio_t* reg, uint32_t value){
static inline void set_gpio_irq_type(volatile gpio_t* reg, uint32_t value){
reg->IRQ_TYPE = (reg->IRQ_TYPE & ~(0xffffffffU << 0)) | (value << 0);
}
//GPIO_BOOT_SEL
inline uint32_t get_gpio_boot_sel(volatile gpio_t* reg){
static inline uint32_t get_gpio_boot_sel(volatile gpio_t* reg){
return reg->BOOT_SEL;
}
inline uint32_t get_gpio_boot_sel_bootSel(volatile gpio_t* reg){
static inline uint32_t get_gpio_boot_sel_bootSel(volatile gpio_t* reg){
return (reg->BOOT_SEL >> 0) & 0x7;
}

76
include/minres/devices/gen/i2s.h
View File

@ -96,132 +96,132 @@ typedef struct {
#define I2S_IP_RIGHT_SAMPLE_AVAIL(V) ((V & I2S_IP_RIGHT_SAMPLE_AVAIL_MASK) << I2S_IP_RIGHT_SAMPLE_AVAIL_OFFS)
//I2S_LEFT_CH
inline uint32_t get_i2s_left_ch(volatile i2s_t* reg){
static inline uint32_t get_i2s_left_ch(volatile i2s_t* reg){
return (reg->LEFT_CH >> 0) & 0xffffffff;
}
//I2S_RIGHT_CH
inline uint32_t get_i2s_right_ch(volatile i2s_t* reg){
static inline uint32_t get_i2s_right_ch(volatile i2s_t* reg){
return (reg->RIGHT_CH >> 0) & 0xffffffff;
}
//I2S_CONTROL
inline uint32_t get_i2s_control(volatile i2s_t* reg){
static inline uint32_t get_i2s_control(volatile i2s_t* reg){
return reg->CONTROL;
}
inline void set_i2s_control(volatile i2s_t* reg, uint32_t value){
static inline void set_i2s_control(volatile i2s_t* reg, uint32_t value){
reg->CONTROL = value;
}
inline uint32_t get_i2s_control_mode(volatile i2s_t* reg){
static inline uint32_t get_i2s_control_mode(volatile i2s_t* reg){
return (reg->CONTROL >> 0) & 0x3;
}
inline void set_i2s_control_mode(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_control_mode(volatile i2s_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x3U << 0)) | (value << 0);
}
inline uint32_t get_i2s_control_disable_left(volatile i2s_t* reg){
static inline uint32_t get_i2s_control_disable_left(volatile i2s_t* reg){
return (reg->CONTROL >> 2) & 0x1;
}
inline void set_i2s_control_disable_left(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_control_disable_left(volatile i2s_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x1U << 2)) | (value << 2);
}
inline uint32_t get_i2s_control_disable_right(volatile i2s_t* reg){
static inline uint32_t get_i2s_control_disable_right(volatile i2s_t* reg){
return (reg->CONTROL >> 3) & 0x1;
}
inline void set_i2s_control_disable_right(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_control_disable_right(volatile i2s_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x1U << 3)) | (value << 3);
}
inline uint32_t get_i2s_control_is_master(volatile i2s_t* reg){
static inline uint32_t get_i2s_control_is_master(volatile i2s_t* reg){
return (reg->CONTROL >> 4) & 0x1;
}
inline void set_i2s_control_is_master(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_control_is_master(volatile i2s_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x1U << 4)) | (value << 4);
}
inline uint32_t get_i2s_control_sample_size(volatile i2s_t* reg){
static inline uint32_t get_i2s_control_sample_size(volatile i2s_t* reg){
return (reg->CONTROL >> 5) & 0x3;
}
inline void set_i2s_control_sample_size(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_control_sample_size(volatile i2s_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x3U << 5)) | (value << 5);
}
inline uint32_t get_i2s_control_pdm_scale(volatile i2s_t* reg){
static inline uint32_t get_i2s_control_pdm_scale(volatile i2s_t* reg){
return (reg->CONTROL >> 7) & 0x7;
}
inline void set_i2s_control_pdm_scale(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_control_pdm_scale(volatile i2s_t* reg, uint8_t value){
reg->CONTROL = (reg->CONTROL & ~(0x7U << 7)) | (value << 7);
}
//I2S_STATUS
inline uint32_t get_i2s_status(volatile i2s_t* reg){
static inline uint32_t get_i2s_status(volatile i2s_t* reg){
return reg->STATUS;
}
inline uint32_t get_i2s_status_enabled(volatile i2s_t* reg){
static inline uint32_t get_i2s_status_enabled(volatile i2s_t* reg){
return (reg->STATUS >> 0) & 0x1;
}
inline uint32_t get_i2s_status_active(volatile i2s_t* reg){
static inline uint32_t get_i2s_status_active(volatile i2s_t* reg){
return (reg->STATUS >> 1) & 0x1;
}
inline uint32_t get_i2s_status_left_avail(volatile i2s_t* reg){
static inline uint32_t get_i2s_status_left_avail(volatile i2s_t* reg){
return (reg->STATUS >> 2) & 0x1;
}
inline uint32_t get_i2s_status_right_avail(volatile i2s_t* reg){
static inline uint32_t get_i2s_status_right_avail(volatile i2s_t* reg){
return (reg->STATUS >> 3) & 0x1;
}
//I2S_I2S_CLOCK_CTRL
inline uint32_t get_i2s_i2s_clock_ctrl(volatile i2s_t* reg){
static inline uint32_t get_i2s_i2s_clock_ctrl(volatile i2s_t* reg){
return reg->I2S_CLOCK_CTRL;
}
inline void set_i2s_i2s_clock_ctrl(volatile i2s_t* reg, uint32_t value){
static inline void set_i2s_i2s_clock_ctrl(volatile i2s_t* reg, uint32_t value){
reg->I2S_CLOCK_CTRL = value;
}
inline uint32_t get_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg){
static inline uint32_t get_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg){
return (reg->I2S_CLOCK_CTRL >> 0) & 0xfffff;
}
inline void set_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg, uint32_t value){
static inline void set_i2s_i2s_clock_ctrl_divider(volatile i2s_t* reg, uint32_t value){
reg->I2S_CLOCK_CTRL = (reg->I2S_CLOCK_CTRL & ~(0xfffffU << 0)) | (value << 0);
}
//I2S_PDM_CLOCK_CTRL
inline uint32_t get_i2s_pdm_clock_ctrl(volatile i2s_t* reg){
static inline uint32_t get_i2s_pdm_clock_ctrl(volatile i2s_t* reg){
return reg->PDM_CLOCK_CTRL;
}
inline void set_i2s_pdm_clock_ctrl(volatile i2s_t* reg, uint32_t value){
static inline void set_i2s_pdm_clock_ctrl(volatile i2s_t* reg, uint32_t value){
reg->PDM_CLOCK_CTRL = value;
}
inline uint32_t get_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg){
static inline uint32_t get_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg){
return (reg->PDM_CLOCK_CTRL >> 0) & 0x3ff;
}
inline void set_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg, uint16_t value){
static inline void set_i2s_pdm_clock_ctrl_divider(volatile i2s_t* reg, uint16_t value){
reg->PDM_CLOCK_CTRL = (reg->PDM_CLOCK_CTRL & ~(0x3ffU << 0)) | (value << 0);
}
//I2S_IE
inline uint32_t get_i2s_ie(volatile i2s_t* reg){
static inline uint32_t get_i2s_ie(volatile i2s_t* reg){
return reg->IE;
}
inline void set_i2s_ie(volatile i2s_t* reg, uint32_t value){
static inline void set_i2s_ie(volatile i2s_t* reg, uint32_t value){
reg->IE = value;
}
inline uint32_t get_i2s_ie_en_left_sample_avail(volatile i2s_t* reg){
static inline uint32_t get_i2s_ie_en_left_sample_avail(volatile i2s_t* reg){
return (reg->IE >> 0) & 0x1;
}
inline void set_i2s_ie_en_left_sample_avail(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_ie_en_left_sample_avail(volatile i2s_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_i2s_ie_en_right_sample_avail(volatile i2s_t* reg){
static inline uint32_t get_i2s_ie_en_right_sample_avail(volatile i2s_t* reg){
return (reg->IE >> 1) & 0x1;
}
inline void set_i2s_ie_en_right_sample_avail(volatile i2s_t* reg, uint8_t value){
static inline void set_i2s_ie_en_right_sample_avail(volatile i2s_t* reg, uint8_t value){
reg->IE = (reg->IE & ~(0x1U << 1)) | (value << 1);
}
//I2S_IP
inline uint32_t get_i2s_ip(volatile i2s_t* reg){
static inline uint32_t get_i2s_ip(volatile i2s_t* reg){
return reg->IP;
}
inline uint32_t get_i2s_ip_left_sample_avail(volatile i2s_t* reg){
static inline uint32_t get_i2s_ip_left_sample_avail(volatile i2s_t* reg){
return (reg->IP >> 0) & 0x1;
}
inline uint32_t get_i2s_ip_right_sample_avail(volatile i2s_t* reg){
static inline uint32_t get_i2s_ip_right_sample_avail(volatile i2s_t* reg){
return (reg->IP >> 1) & 0x1;
}

50
include/minres/devices/gen/msgif.h
View File

@ -94,103 +94,103 @@ typedef struct {
#define MSGIF_REG_PAYLOAD_7(V) ((V & MSGIF_REG_PAYLOAD_7_MASK) << MSGIF_REG_PAYLOAD_7_OFFS)
//MSGIF_REG_SEND
inline void set_msgif_REG_SEND(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_SEND(volatile msgif_t* reg, uint32_t value){
reg->REG_SEND = value;
}
inline void set_msgif_REG_SEND_SEND(volatile msgif_t* reg, uint8_t value){
static inline void set_msgif_REG_SEND_SEND(volatile msgif_t* reg, uint8_t value){
reg->REG_SEND = (reg->REG_SEND & ~(0x1U << 0)) | (value << 0);
}
//MSGIF_REG_HEADER
inline uint32_t get_msgif_REG_HEADER(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_HEADER(volatile msgif_t* reg){
return reg->REG_HEADER;
}
inline void set_msgif_REG_HEADER(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_HEADER(volatile msgif_t* reg, uint32_t value){
reg->REG_HEADER = value;
}
inline uint32_t get_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg){
return (reg->REG_HEADER >> 0) & 0x7;
}
inline void set_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg, uint8_t value){
static inline void set_msgif_REG_HEADER_RECIPIENT_COMPONENT(volatile msgif_t* reg, uint8_t value){
reg->REG_HEADER = (reg->REG_HEADER & ~(0x7U << 0)) | (value << 0);
}
inline uint32_t get_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg){
return (reg->REG_HEADER >> 3) & 0x3;
}
inline void set_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg, uint8_t value){
static inline void set_msgif_REG_HEADER_RECIPIENT_CLUSTER(volatile msgif_t* reg, uint8_t value){
reg->REG_HEADER = (reg->REG_HEADER & ~(0x3U << 3)) | (value << 3);
}
inline uint32_t get_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg){
return (reg->REG_HEADER >> 5) & 0xf;
}
inline void set_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg, uint8_t value){
static inline void set_msgif_REG_HEADER_MESSAGE_LENGTH(volatile msgif_t* reg, uint8_t value){
reg->REG_HEADER = (reg->REG_HEADER & ~(0xfU << 5)) | (value << 5);
}
inline uint32_t get_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg){
return (reg->REG_HEADER >> 9) & 0xf;
}
inline void set_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg, uint8_t value){
static inline void set_msgif_REG_HEADER_MESSAGE_ID(volatile msgif_t* reg, uint8_t value){
reg->REG_HEADER = (reg->REG_HEADER & ~(0xfU << 9)) | (value << 9);
}
//MSGIF_REG_ACK
inline void set_msgif_REG_ACK(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_ACK(volatile msgif_t* reg, uint32_t value){
reg->REG_ACK = value;
}
inline void set_msgif_REG_ACK_ACK(volatile msgif_t* reg, uint8_t value){
static inline void set_msgif_REG_ACK_ACK(volatile msgif_t* reg, uint8_t value){
reg->REG_ACK = (reg->REG_ACK & ~(0x1U << 0)) | (value << 0);
}
//MSGIF_REG_RECV_ID
inline uint32_t get_msgif_REG_RECV_ID(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_RECV_ID(volatile msgif_t* reg){
return reg->REG_RECV_ID;
}
inline uint32_t get_msgif_REG_RECV_ID_RECV_ID(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_RECV_ID_RECV_ID(volatile msgif_t* reg){
return (reg->REG_RECV_ID >> 0) & 0xf;
}
//MSGIF_REG_RECV_PAYLOAD
inline uint32_t get_msgif_REG_RECV_PAYLOAD(volatile msgif_t* reg){
static inline uint32_t get_msgif_REG_RECV_PAYLOAD(volatile msgif_t* reg){
return (reg->REG_RECV_PAYLOAD >> 0) & 0xffffffff;
}
//MSGIF_REG_PAYLOAD_0
inline void set_msgif_REG_PAYLOAD_0(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_0(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_0 = (reg->REG_PAYLOAD_0 & ~(0xffffffffU << 0)) | (value << 0);
}
//MSGIF_REG_PAYLOAD_1
inline void set_msgif_REG_PAYLOAD_1(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_1(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_1 = (reg->REG_PAYLOAD_1 & ~(0xffffffffU << 0)) | (value << 0);
}
//MSGIF_REG_PAYLOAD_2
inline void set_msgif_REG_PAYLOAD_2(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_2(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_2 = (reg->REG_PAYLOAD_2 & ~(0xffffffffU << 0)) | (value << 0);
}
//MSGIF_REG_PAYLOAD_3
inline void set_msgif_REG_PAYLOAD_3(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_3(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_3 = (reg->REG_PAYLOAD_3 & ~(0xffffffffU << 0)) | (value << 0);
}
//MSGIF_REG_PAYLOAD_4
inline void set_msgif_REG_PAYLOAD_4(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_4(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_4 = (reg->REG_PAYLOAD_4 & ~(0xffffffffU << 0)) | (value << 0);
}
//MSGIF_REG_PAYLOAD_5
inline void set_msgif_REG_PAYLOAD_5(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_5(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_5 = (reg->REG_PAYLOAD_5 & ~(0xffffffffU << 0)) | (value << 0);
}
//MSGIF_REG_PAYLOAD_6
inline void set_msgif_REG_PAYLOAD_6(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_6(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_6 = (reg->REG_PAYLOAD_6 & ~(0xffffffffU << 0)) | (value << 0);
}
//MSGIF_REG_PAYLOAD_7
inline void set_msgif_REG_PAYLOAD_7(volatile msgif_t* reg, uint32_t value){
static inline void set_msgif_REG_PAYLOAD_7(volatile msgif_t* reg, uint32_t value){
reg->REG_PAYLOAD_7 = (reg->REG_PAYLOAD_7 & ~(0xffffffffU << 0)) | (value << 0);
}

44
include/minres/devices/gen/timercounter.h
View File

@ -59,82 +59,82 @@ typedef struct {
#define TIMERCOUNTER_T1_VALUE(V) ((V & TIMERCOUNTER_T1_VALUE_MASK) << TIMERCOUNTER_T1_VALUE_OFFS)
//TIMERCOUNTER_PRESCALER
inline uint32_t get_timercounter_prescaler(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_prescaler(volatile timercounter_t* reg){
return reg->PRESCALER;
}
inline void set_timercounter_prescaler(volatile timercounter_t* reg, uint32_t value){
static inline void set_timercounter_prescaler(volatile timercounter_t* reg, uint32_t value){
reg->PRESCALER = value;
}
inline uint32_t get_timercounter_prescaler_limit(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_prescaler_limit(volatile timercounter_t* reg){
return (reg->PRESCALER >> 0) & 0xffff;
}
inline void set_timercounter_prescaler_limit(volatile timercounter_t* reg, uint16_t value){
static inline void set_timercounter_prescaler_limit(volatile timercounter_t* reg, uint16_t value){
reg->PRESCALER = (reg->PRESCALER & ~(0xffffU << 0)) | (value << 0);
}
//TIMERCOUNTER_T0_CTRL
inline uint32_t get_timercounter_t0_ctrl(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t0_ctrl(volatile timercounter_t* reg){
return reg->T0_CTRL;
}
inline void set_timercounter_t0_ctrl(volatile timercounter_t* reg, uint32_t value){
static inline void set_timercounter_t0_ctrl(volatile timercounter_t* reg, uint32_t value){
reg->T0_CTRL = value;
}
inline uint32_t get_timercounter_t0_ctrl_enable(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t0_ctrl_enable(volatile timercounter_t* reg){
return (reg->T0_CTRL >> 0) & 0x7;
}
inline void set_timercounter_t0_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
static inline void set_timercounter_t0_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
reg->T0_CTRL = (reg->T0_CTRL & ~(0x7U << 0)) | (value << 0);
}
inline uint32_t get_timercounter_t0_ctrl_clear(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t0_ctrl_clear(volatile timercounter_t* reg){
return (reg->T0_CTRL >> 3) & 0x3;
}
inline void set_timercounter_t0_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
static inline void set_timercounter_t0_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
reg->T0_CTRL = (reg->T0_CTRL & ~(0x3U << 3)) | (value << 3);
}
//TIMERCOUNTER_T0_OVERFLOW
inline uint32_t get_timercounter_t0_overflow(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t0_overflow(volatile timercounter_t* reg){
return (reg->T0_OVERFLOW >> 0) & 0xffffffff;
}
inline void set_timercounter_t0_overflow(volatile timercounter_t* reg, uint32_t value){
static inline void set_timercounter_t0_overflow(volatile timercounter_t* reg, uint32_t value){
reg->T0_OVERFLOW = (reg->T0_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
}
//TIMERCOUNTER_T0_VALUE
inline uint32_t get_timercounter_t0_value(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t0_value(volatile timercounter_t* reg){
return (reg->T0_VALUE >> 0) & 0xffffffff;
}
//TIMERCOUNTER_T1_CTRL
inline uint32_t get_timercounter_t1_ctrl(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t1_ctrl(volatile timercounter_t* reg){
return reg->T1_CTRL;
}
inline void set_timercounter_t1_ctrl(volatile timercounter_t* reg, uint32_t value){
static inline void set_timercounter_t1_ctrl(volatile timercounter_t* reg, uint32_t value){
reg->T1_CTRL = value;
}
inline uint32_t get_timercounter_t1_ctrl_enable(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t1_ctrl_enable(volatile timercounter_t* reg){
return (reg->T1_CTRL >> 0) & 0x7;
}
inline void set_timercounter_t1_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
static inline void set_timercounter_t1_ctrl_enable(volatile timercounter_t* reg, uint8_t value){
reg->T1_CTRL = (reg->T1_CTRL & ~(0x7U << 0)) | (value << 0);
}
inline uint32_t get_timercounter_t1_ctrl_clear(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t1_ctrl_clear(volatile timercounter_t* reg){
return (reg->T1_CTRL >> 3) & 0x3;
}
inline void set_timercounter_t1_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
static inline void set_timercounter_t1_ctrl_clear(volatile timercounter_t* reg, uint8_t value){
reg->T1_CTRL = (reg->T1_CTRL & ~(0x3U << 3)) | (value << 3);
}
//TIMERCOUNTER_T1_OVERFLOW
inline uint32_t get_timercounter_t1_overflow(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t1_overflow(volatile timercounter_t* reg){
return (reg->T1_OVERFLOW >> 0) & 0xffffffff;
}
inline void set_timercounter_t1_overflow(volatile timercounter_t* reg, uint32_t value){
static inline void set_timercounter_t1_overflow(volatile timercounter_t* reg, uint32_t value){
reg->T1_OVERFLOW = (reg->T1_OVERFLOW & ~(0xffffffffU << 0)) | (value << 0);
}
//TIMERCOUNTER_T1_VALUE
inline uint32_t get_timercounter_t1_value(volatile timercounter_t* reg){
static inline uint32_t get_timercounter_t1_value(volatile timercounter_t* reg){
return (reg->T1_VALUE >> 0) & 0xffffffff;
}

82
include/minres/devices/gen/uart.h
View File

@ -101,135 +101,135 @@ typedef struct {
#define UART_STATUS_REG_CLEAR_BREAK(V) ((V & UART_STATUS_REG_CLEAR_BREAK_MASK) << UART_STATUS_REG_CLEAR_BREAK_OFFS)
//UART_RX_TX_REG
inline uint32_t get_uart_rx_tx_reg(volatile uart_t* reg){
static inline uint32_t get_uart_rx_tx_reg(volatile uart_t* reg){
return reg->RX_TX_REG;
}
inline void set_uart_rx_tx_reg(volatile uart_t* reg, uint32_t value){
static inline void set_uart_rx_tx_reg(volatile uart_t* reg, uint32_t value){
reg->RX_TX_REG = value;
}
inline uint32_t get_uart_rx_tx_reg_data(volatile uart_t* reg){
static inline uint32_t get_uart_rx_tx_reg_data(volatile uart_t* reg){
return (reg->RX_TX_REG >> 0) & 0xff;
}
inline void set_uart_rx_tx_reg_data(volatile uart_t* reg, uint8_t value){
static inline void set_uart_rx_tx_reg_data(volatile uart_t* reg, uint8_t value){
reg->RX_TX_REG = (reg->RX_TX_REG & ~(0xffU << 0)) | (value << 0);
}
inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile uart_t* reg){
static inline uint32_t get_uart_rx_tx_reg_rx_avail(volatile uart_t* reg){
return (reg->RX_TX_REG >> 14) & 0x1;
}
inline uint32_t get_uart_rx_tx_reg_tx_free(volatile uart_t* reg){
static inline uint32_t get_uart_rx_tx_reg_tx_free(volatile uart_t* reg){
return (reg->RX_TX_REG >> 15) & 0x1;
}
inline uint32_t get_uart_rx_tx_reg_tx_empty(volatile uart_t* reg){
static inline uint32_t get_uart_rx_tx_reg_tx_empty(volatile uart_t* reg){
return (reg->RX_TX_REG >> 16) & 0x1;
}
//UART_INT_CTRL_REG
inline uint32_t get_uart_int_ctrl_reg(volatile uart_t* reg){
static inline uint32_t get_uart_int_ctrl_reg(volatile uart_t* reg){
return reg->INT_CTRL_REG;
}
inline void set_uart_int_ctrl_reg(volatile uart_t* reg, uint32_t value){
static inline void set_uart_int_ctrl_reg(volatile uart_t* reg, uint32_t value){
reg->INT_CTRL_REG = value;
}
inline uint32_t get_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg){
static inline uint32_t get_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg){
return (reg->INT_CTRL_REG >> 0) & 0x1;
}
inline void set_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg, uint8_t value){
static inline void set_uart_int_ctrl_reg_write_intr_enable(volatile uart_t* reg, uint8_t value){
reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 0)) | (value << 0);
}
inline uint32_t get_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg){
static inline uint32_t get_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg){
return (reg->INT_CTRL_REG >> 1) & 0x1;
}
inline void set_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg, uint8_t value){
static inline void set_uart_int_ctrl_reg_read_intr_enable(volatile uart_t* reg, uint8_t value){
reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 1)) | (value << 1);
}
inline uint32_t get_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg){
static inline uint32_t get_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg){
return (reg->INT_CTRL_REG >> 2) & 0x1;
}
inline void set_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg, uint8_t value){
static inline void set_uart_int_ctrl_reg_break_intr_enable(volatile uart_t* reg, uint8_t value){
reg->INT_CTRL_REG = (reg->INT_CTRL_REG & ~(0x1U << 2)) | (value << 2);
}
inline uint32_t get_uart_int_ctrl_reg_write_intr_pend(volatile uart_t* reg){
static inline uint32_t get_uart_int_ctrl_reg_write_intr_pend(volatile uart_t* reg){
return (reg->INT_CTRL_REG >> 8) & 0x1;
}
inline uint32_t get_uart_int_ctrl_reg_read_intr_pend(volatile uart_t* reg){
static inline uint32_t get_uart_int_ctrl_reg_read_intr_pend(volatile uart_t* reg){
return (reg->INT_CTRL_REG >> 9) & 0x1;
}
inline uint32_t get_uart_int_ctrl_reg_break_intr_pend(volatile uart_t* reg){
static inline uint32_t get_uart_int_ctrl_reg_break_intr_pend(volatile uart_t* reg){
return (reg->INT_CTRL_REG >> 10) & 0x1;
}
//UART_CLK_DIVIDER_REG
inline uint32_t get_uart_clk_divider_reg(volatile uart_t* reg){
static inline uint32_t get_uart_clk_divider_reg(volatile uart_t* reg){
return reg->CLK_DIVIDER_REG;
}
inline void set_uart_clk_divider_reg(volatile uart_t* reg, uint32_t value){
static inline void set_uart_clk_divider_reg(volatile uart_t* reg, uint32_t value){
reg->CLK_DIVIDER_REG = value;
}
inline uint32_t get_uart_clk_divider_reg_clock_divider(volatile uart_t* reg){
static inline uint32_t get_uart_clk_divider_reg_clock_divider(volatile uart_t* reg){
return (reg->CLK_DIVIDER_REG >> 0) & 0xfffff;
}
inline void set_uart_clk_divider_reg_clock_divider(volatile uart_t* reg, uint32_t value){
static inline void set_uart_clk_divider_reg_clock_divider(volatile uart_t* reg, uint32_t value){
reg->CLK_DIVIDER_REG = (reg->CLK_DIVIDER_REG & ~(0xfffffU << 0)) | (value << 0);
}
//UART_FRAME_CONFIG_REG
inline uint32_t get_uart_frame_config_reg(volatile uart_t* reg){
static inline uint32_t get_uart_frame_config_reg(volatile uart_t* reg){
return reg->FRAME_CONFIG_REG;
}
inline void set_uart_frame_config_reg(volatile uart_t* reg, uint32_t value){
static inline void set_uart_frame_config_reg(volatile uart_t* reg, uint32_t value){
reg->FRAME_CONFIG_REG = value;
}
inline uint32_t get_uart_frame_config_reg_data_length(volatile uart_t* reg){
static inline uint32_t get_uart_frame_config_reg_data_length(volatile uart_t* reg){
return (reg->FRAME_CONFIG_REG >> 0) & 0x7;
}
inline void set_uart_frame_config_reg_data_length(volatile uart_t* reg, uint8_t value){
static inline void set_uart_frame_config_reg_data_length(volatile uart_t* reg, uint8_t value){
reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x7U << 0)) | (value << 0);
}
inline uint32_t get_uart_frame_config_reg_parity(volatile uart_t* reg){
static inline uint32_t get_uart_frame_config_reg_parity(volatile uart_t* reg){
return (reg->FRAME_CONFIG_REG >> 3) & 0x3;
}
inline void set_uart_frame_config_reg_parity(volatile uart_t* reg, uint8_t value){
static inline void set_uart_frame_config_reg_parity(volatile uart_t* reg, uint8_t value){
reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x3U << 3)) | (value << 3);
}
inline uint32_t get_uart_frame_config_reg_stop_bit(volatile uart_t* reg){
static inline uint32_t get_uart_frame_config_reg_stop_bit(volatile uart_t* reg){
return (reg->FRAME_CONFIG_REG >> 5) & 0x1;
}
inline void set_uart_frame_config_reg_stop_bit(volatile uart_t* reg, uint8_t value){
static inline void set_uart_frame_config_reg_stop_bit(volatile uart_t* reg, uint8_t value){
reg->FRAME_CONFIG_REG = (reg->FRAME_CONFIG_REG & ~(0x1U << 5)) | (value << 5);
}
//UART_STATUS_REG
inline uint32_t get_uart_status_reg(volatile uart_t* reg){
static inline uint32_t get_uart_status_reg(volatile uart_t* reg){
return reg->STATUS_REG;
}
inline void set_uart_status_reg(volatile uart_t* reg, uint32_t value){
static inline void set_uart_status_reg(volatile uart_t* reg, uint32_t value){
reg->STATUS_REG = value;
}
inline uint32_t get_uart_status_reg_read_error(volatile uart_t* reg){
static inline uint32_t get_uart_status_reg_read_error(volatile uart_t* reg){
return (reg->STATUS_REG >> 0) & 0x1;
}
inline uint32_t get_uart_status_reg_stall(volatile uart_t* reg){
static inline uint32_t get_uart_status_reg_stall(volatile uart_t* reg){
return (reg->STATUS_REG >> 1) & 0x1;
}
inline uint32_t get_uart_status_reg_break_line(volatile uart_t* reg){
static inline uint32_t get_uart_status_reg_break_line(volatile uart_t* reg){
return (reg->STATUS_REG >> 8) & 0x1;
}
inline uint32_t get_uart_status_reg_break_detected(volatile uart_t* reg){
static inline uint32_t get_uart_status_reg_break_detected(volatile uart_t* reg){
return (reg->STATUS_REG >> 9) & 0x1;
}
inline void set_uart_status_reg_break_detected(volatile uart_t* reg, uint8_t value){
static inline void set_uart_status_reg_break_detected(volatile uart_t* reg, uint8_t value){
reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 9)) | (value << 9);
}
inline uint32_t get_uart_status_reg_set_break(volatile uart_t* reg){
static inline uint32_t get_uart_status_reg_set_break(volatile uart_t* reg){
return (reg->STATUS_REG >> 10) & 0x1;
}
inline void set_uart_status_reg_set_break(volatile uart_t* reg, uint8_t value){
static inline void set_uart_status_reg_set_break(volatile uart_t* reg, uint8_t value){
reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 10)) | (value << 10);
}
inline uint32_t get_uart_status_reg_clear_break(volatile uart_t* reg){
static inline uint32_t get_uart_status_reg_clear_break(volatile uart_t* reg){
return (reg->STATUS_REG >> 11) & 0x1;
}
inline void set_uart_status_reg_clear_break(volatile uart_t* reg, uint8_t value){
static inline void set_uart_status_reg_clear_break(volatile uart_t* reg, uint8_t value){
reg->STATUS_REG = (reg->STATUS_REG & ~(0x1U << 11)) | (value << 11);
}

2
include/minres/devices/gpio.h
View File

@ -4,7 +4,7 @@
#include <stdint.h>
#include "gen/gpio.h"
inline void gpio_init(volatile gpio_t* reg) {
static inline void gpio_init(volatile gpio_t* reg) {
set_gpio_write(reg, 0);
set_gpio_writeEnable(reg, 0);
}

6
include/minres/devices/timer.h
View File

@ -4,15 +4,15 @@
#include <stdint.h>
#include "gen/timercounter.h"
inline void prescaler_init(timercounter_t* reg, uint16_t value){
static inline void prescaler_init(timercounter_t* reg, uint16_t value){
set_timercounter_prescaler(reg, value);
}
inline void timer_t0__init(timercounter_t *reg){
static inline void timer_t0__init(timercounter_t *reg){
set_timercounter_t0_overflow(reg, 0xffffffff);
}
inline void timer_t1__init(timercounter_t *reg){
static inline void timer_t1__init(timercounter_t *reg){
set_timercounter_t1_overflow(reg, 0xffffffff);
}

2
include/minres/devices/uart.h
View File

@ -21,7 +21,7 @@ static inline void uart_write(volatile uart_t* reg, uint8_t data){
set_uart_rx_tx_reg_data(reg, data);
}
static inline inline uint8_t uart_read(volatile uart_t* reg){
static inline uint8_t uart_read(volatile uart_t* reg){
uint32_t res = get_uart_rx_tx_reg_data(reg);
while((res&0x10000) == 0) res = get_uart_rx_tx_reg_data(reg);
return res;