Firmware/MNRS-BM-BSP
9
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

add cache flush to cluster info

Browse Source
This commit is contained in:
Johannes Wirth
2025-05-15 20:11:55 +02:00
parent 30cebaa066
commit 5f26d9081c
1 changed files with 25 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

29
include/ehrenberg/devices/fki_cluster_info.h
View File

@ -13,6 +13,7 @@ static inline uint32_t fki_addr_sram2(uint8_t cluster);
static inline uint32_t fki_addr_cntrl_cva5(uint8_t cluster);
static inline uint32_t fki_addr_cntrl_tgc(uint8_t cluster);
static inline uint32_t fki_addr_ccc_idxTasks(uint8_t cluster);
static inline uint32_t fki_addr_cacheFlushControl(uint8_t cluster);
static inline uint32_t fki_addr_cntrl_tgc_clusterReg(uint8_t cluster);
static inline uint32_t fki_addr_ccc_idxJobs(uint8_t cluster);
static inline uint32_t fki_addr_cntrl_cva5_clusterReg(uint8_t cluster);
@ -56,8 +57,11 @@ static inline uint32_t fki_addr_sram3(uint8_t cluster);
#define BYTES_Compute0_cntrl_tgc 8192
#define HIGH_Compute0_cntrl_tgc 0x8000cfff
#define ADDR_Compute0_ut_adapter 0x8000e000
#define BYTES_Compute0_ut_adapter 8192
#define HIGH_Compute0_ut_adapter 0x8000ffff
#define BYTES_Compute0_ut_adapter 4096
#define HIGH_Compute0_ut_adapter 0x8000efff
#define ADDR_Compute0_cacheFlushControl 0x8000f000
#define BYTES_Compute0_cacheFlushControl 4096
#define HIGH_Compute0_cacheFlushControl 0x8000ffff
#define ADDR_Compute0_sram0 0x80010000
#define BYTES_Compute0_sram0 524288
#define HIGH_Compute0_sram0 0x8008ffff
@ -104,8 +108,11 @@ static inline uint32_t fki_addr_sram3(uint8_t cluster);
#define BYTES_Compute1_cntrl_tgc 12288
#define HIGH_Compute1_cntrl_tgc 0x9000dfff
#define ADDR_Compute1_ut_adapter 0x9000e000
#define BYTES_Compute1_ut_adapter 8192
#define HIGH_Compute1_ut_adapter 0x9000ffff
#define BYTES_Compute1_ut_adapter 4096
#define HIGH_Compute1_ut_adapter 0x9000efff
#define ADDR_Compute1_cacheFlushControl 0x9000f000
#define BYTES_Compute1_cacheFlushControl 4096
#define HIGH_Compute1_cacheFlushControl 0x9000ffff
#define ADDR_Compute1_sram0 0x90010000
#define BYTES_Compute1_sram0 524288
#define HIGH_Compute1_sram0 0x9008ffff
@ -273,6 +280,20 @@ static inline uint32_t fki_addr_ccc_idxTasks(uint8_t cluster) {
}
}
static inline uint32_t fki_addr_cacheFlushControl(uint8_t cluster) {
switch(cluster) {
case 3: {
return 0x9000f000;
}
case 2: {
return 0x8000f000;
}
default: {
return -1;
}
}
}
static inline uint32_t fki_addr_cntrl_tgc_clusterReg(uint8_t cluster) {
switch(cluster) {
case 3: {